Hi,
I really appreciate if someone can help me, because I have been confused almost one week. Sorry for my poor English
I use IIC ip core under EDK. I have writen a driver, but I found it doesn't work.
I just use code like this:
send_cnt = XIic_Send(XPAR_XPS_IIC_0_BASEADDR, ADDR_DECOD, send_data, 2, XIIC_STOP);
So under SDK, I debug it, I found the code just stop here (inside xiic_l.c file)
StatusReg = XIic_ReadReg(BaseAddress, XIIC_SR_REG_OFFSET);
while ((StatusReg & XIIC_SR_BUS_BUSY_MASK) == 0) {
StatusReg = XIic_ReadReg(BaseAddress,
XIIC_SR_REG_OFFSET);
}
The debug information showed: StatusReg = 64, and the whole program just stay here and no longer go any more. I checked the Xilinx IIC core pdf: http://www.xilinx.com/support/documentation/ip_documentation/xps_iic.pdf in page 16
I found this line actually check whether IIC bus busy or not. but here if I want to send the data, don't I want to make sure the bus is not busy? Is there anything wrong with Xilinx library?or what should I do to fix it?
Thank you very much!
sniu@hawk.iit.edu
