05-21-2009 08:35 AM
I'm searching for a way to design a custom IP core attached to the microblaze's PLB that can recieve (and interface) a signal generated by an entity created in ISE.
To accomplish this, I started an ISE project and programmed an entity which sends a two state signal as output, and then added an EDK source to the ISE project. Within the ISE project, i created the microblaze and its default cores using the BSB wizard. Next, i created the custom core and set an input port in user_logic (FEDATA_ACK : in STD_LOGIC;), however when i'm importing the created custom core (in EDK) with a very simple user logic written, i get an error in the import peripheral wizard:
dl/fe_in_controller.vhd" Line 707. Formal FEDATA_ACK of entity with no
default value must be associated with an actual value.
ERROR:MDT - Parse Errors encountered in HDL source
WARNING:MDT - Unable to delete temparary project file
It complaints that i have to have an associated value with FEDATA_ACK, which in my case I want it to be the output of the ISE created entity. How can i make such interface?
Sorry about the double post in implementation section; i was not shure where to post this doubt.
Solved! Go to Solution.
05-22-2009 03:22 AM - edited 05-22-2009 03:24 AM
Just check the obvious, did you add that port to the top level as well (fe_in_controller.vhd)?