07-08-2009 01:56 AM
Everytime I run the selftest of a custom core with interrupt capability it freezes on the following instruction (tested with xmd):
INTEST_mWriteReg(baseaddr, INTEST_INTR_IPISR_OFFSET, Reg32Value);
In hyperterminal I only see
Interrupt controller test...
- IP (user logic) interrupt status : 0x00000000
- clear IP (user logic) interrupt status register
Why is this happening?Any ideas?
Solved! Go to Solution.
07-08-2009 04:30 AM
I have solved this by noticing a bug on EDK.
If the ISC is not selected in the peripheral create wizard, the created driver for the custom core still tries to write to a specific ISC register. This can be avoided by setting the C_INCLUSE_DPHASE_TIMER to 1 (easily set by right-clicking in the core in assembly view->Configure IP), which will allow timeout upon a unacknowledged instruction, as is the case. Therefore the freeze disapears as it overcomes writing to an unknown register if we don't activate the ISC device when generating the custom core.