Embedded Processors and Peripherals

[changyun]

Does anyone has an idea how can I use larger BRAM (more than 64K) in a MicroBlaze project? From the MicroBlaze user guide, it looks like I need to generate

a new BRAM module using core generator. I did that and now I have vhdl source file for 128K BRAM module and need to incorporate this module into my project.

I checked the Create or Import Peripheral Wizard. Seems it can incorporate peripheral modules which connect to PLB.  But in my case, I want to replace the default 64K BRAM

in XPS using my 128K one and connect it to LMB. Is there any way to do that? Or is there any way I can go to enlarge the BRAM size?  Thanks.

[jmonteiro-dme]

EDK->System Assembly View->Addresses->

Increase data local memory bus (dlmb)  and instruction local memory bus (ilmb) BRAM controller's address range, hence changing the memory space to, say, 128K of both equally. Don't forget to re-generate the linker script of your application.

Best,

JM

[changyun]

I tried yesterday but did not work. Maybe forgot to regenerate the linker script. I will try again. Thx. 

Bests,

Changyun 

[goran]

Hi,

There is no need to use the core generator.

If you want more BRAM on the LMB bus, just add more lmb_bram_if_cntlr and connect them to new bram_module.

Each lmb_bram_if_cntlr can handle 64kbyte so just add more of them.

The same if the BRAM is on the OPB or PLB, just add the bram_controller for that bus and a new bram_module.

This can be done in the normal system assembly view in XPS.

Göran

Message Edited by goran_bilski on 07-15-2009 01:25 PM

[changyun]

Hi,

I added in one more bram_block and one more lmb_bram_if_cntlr, generate addresses in system assembly view. In SDK, I did xilinx tools->synchronize with hardware, re-generate

linker script, compile, generate the elf file.  Then updated bitstream in XPS, downloaded bitstream to the board. But seems the software did not really execute (even in my linker script,

I did not use the newly added BRAM block). Is there any missing steps?

Thanks. 

Bests,

Changyun 

[goran]

Hi,

Did you connect them to MicroBlaze?

Can you post the .mhs?

If you only added one more lmb_bram_if_cntlr, did you connect it to the ILMB or DLMB interface on MicroBlaze?

Do you need more BRAM for code or for data?

If you added it for code, you need to add another lmb_bram_if_cntlr so that the data side can have access to this bram.

Data need access to the instruction memory if you want to download to it or setting soft breakpoints.

Göran

Message Edited by goran_bilski on 07-16-2009 08:33 AM

[changyun]

Hi,

It works now. I regenerated the libraries and BSPs then it works now. Thanks a lot for your help.

Bests,

Changyun  

[thirdeye]

Göran,

My EDK executable .data section is ~ 84K. I have a 64 K BRAM but I cannot fit this section into this BRAM. Is there any way to split code sections into smaller sections for using multiple BRAMs to store a given section?

Thank you,

Josh 

[goran]

Hi,

Just add another 32k lmb_bram controller and make the address align with the 64k BRAM block.

This makes MicroBlaze to have a contiguous memory region of 96 K which should be enough for your application.

Göran

[thirdeye]

Great, however, the Linker Script generator does not allow me to use this as one location since my individual memories cannot hold the .data section without splitting it up.

I have attempted to setup the linker script manually, but there ar emany things I am unsure about.

Is ther any way to"merge" these such that the linker script generator can see them as one?

Any other ideas?