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Nexys 3 BSB package's memory mux controller seems pretty busted.
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03-29-2012 11:32 PM
Has anyone had any success at all using the external memory mux IP that's included in the BSB files for the Nexys 3 board?
I have followed the instructions to the letter, and while the PSRAM memory region passes the SDK's memory tests, I get nothng but solid failure when I test the memory region assigned to the parallel flash, or use the debugger to inspect its contents, it's garbage. I was hoping to use the SDK to generate some apps to store in flash and then just use the simple SREC loader to copy them to PSRAM to run, but since it can't successfully read the flash, I'm stuck. I have not even attempted to decipher the register interface it provides for the SPI flash.
The Digilent Adept tool can successfully access and test the flash, but I find it very annoying that they can't even provide a simple sample app that will accomplish the same thing.
Solved! Go to Solution.
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Re: Nexys 3 BSB package's memory mux controller seems pretty busted.
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03-31-2012 08:02 AM
I should point out that I don't expect the memory test to write the parallel flash. I can write it fine with Adept but the read results within a generated EDK system are garbage and bear no relation to the written bytes.
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Re: Nexys 3 BSB package's memory mux controller seems pretty busted.
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04-19-2012 06:05 PM
Finally found the solution - and it was really simple (stupid on my part.) You need to write an FF to the flash part at the top of the bootloader to ensure that the chip is in standard "read" mode. The memory is then normally addressable/accessible and the bootloader works.











