Embedded Processors and Peripherals

[mmdst23]

Is there a good simulation model for the FSL Interface?  I've got a coop working on getting a uBlaze system up and running and Ethernet working on an eval board while I'm working on the overall system requirements/specs/interfaces, and I'd like to get a quick and dirty core with an FSL interface up and running for him to talk to, and I'd like to see what it's doing in the sim before I put it on the board.

 We're using Aldec Active-HDL and Riviera Pro, but both are capable of running sim models using the Xilinx libs, so the simulator shouldn't be an issue.

Thanks,

Mike

[goran]

Hi,

Not sure what kind of simulation model you want. 

If I want to create FSL stimulus I usually use a MicroBlaze with FSL since it allows me to execute code that generates FSL traffic.

So just add another MicroBlaze with FSL as your FSL traffic generator/checker.

Göran