10-20-2009 07:15 AM
Jim's instructions on how to implement tristates in EDK are correct.
These can only be at the top level.
This tool seems to have taken a backwards step from defining them in VHDL, where at least you can simulate them easily and not worry about the tristate control polarity!
When you connect it up in the PORTS screen you need to leave the _O, _I, and _T versions unconnected, and only connect the tristate one (auto generated but defined in the .mpd) to the external pins.
It handles busses OK. For the .ucf the bus bits are defined with diamond brackets, thus <1>.
Hope this helps.