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Super Contributor
elvisjohndowson
Posts: 145
Registered: ‎12-30-2008
0

FPGA device integration protocol - NAND or NOR?

Hi,

        I'm trying to integrate the TI OMAP 35xx General Purpose Memory Controller (GPMC) with a Xilinx Virtex-5 / Spartan-3AN FPGA.

 

I have a basic question, should the FPGA be integrated with the GPMC using a NAND or NOR protocol?

 

Here is an excerpt from the TI OMAP 35xx Technical Reference Manual (Rev. B).

 

 

11.1.6.2.1 Supported Memories or Devices
General-Purpose Memory Controller (GPMC) www.ti.com
This section is intended to help the user select a suitable memory device to interface with the GPMC
controller.
NAND flash and NOR flash architectures are the two flash technologies. The GPMC supports various
types of external memory or device, basically any one that supports NAND or NOR protocols:
· 8- and 16-bit width asynchronous or synchronous memory or device (8-bit: non burst device only)

 

 

 

Best regards,

 

Elvis Dowson 

Xilinx Employee
defossez
Posts: 30
Registered: ‎04-17-2008
0

Re: FPGA device integration protocol - NAND or NOR?

Hallo,

 

As the OMAP text reads, either NAND or NOR will work.

What protocol is the fastest and using the wides data bus?, that is the one I should take to implement.

 

0.02 euro,

 

Marc