06-01-2012 11:37 AM
In my application i have a FIFO as the first stage memory unit. I am using STROBE signal as the write clock signal. do I need to run this clock signal using a IBUFG? Since I have only 4 GCLK sites in spartan2 those are accupied by other clock sources to the chip (which i dont use except one). When I tried to use IBUFG it gives me error saying IPAD-IBUFG only should be loced at to GCKIOB site.
My question is do need to use GCKIOB for this clock signal to fifo?
when I used IBUF instead of IBUFG I was able to compile without a error. But I don't know if FIFO would function properly.
Thanks in advance
06-14-2012 06:56 AM
06-14-2012 09:43 AM
I am using xilinx ISE ver 10.1 with spartan 2 FPGA. I am trying to implement a FIFO. i have 19 digital I/O lines with strobe signal to read and store in the FIFO. i am using STROBE as the clock. does this clock signal need to be run through a global clock buffer?
07-24-2012 04:26 AM