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VHDL works only with spartan 3AN
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04-14-2012 09:50 AM
Hi,
I wrote a vhdl code that interface with a module through SPI communication protocol my code was done in FSM with next state logic, it worked perfectly with my spartan 3AN board but when i try it on ALTERA DE0-nano baord it didnt work at all although its pure VHDL what i understand is that vhdl is suitable for any FPGA, so can any body please explain to me whats happinig.another if i didnt use global a reset for the code does it make difference ?
SPI works only with spartan 3AN
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04-14-2012 12:02 PM
You should tell the Altera support folks that SPI interfaces do not work on Altera devices. This isn't true, but it should get their attention.
You should post this on some other user forum, though, and not here. I don't think the Altera folks read these (Xilinx) user forums very often.
-- Bob Elkind
README for newbies is here: http://forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369
Summary:
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Re: VHDL works only with spartan 3AN
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04-15-2012 11:30 PM
Hi,
unfortunately you didn't post the error messages you were seeing.
Your question about the global reset makes me guess that you are having problems with that.
If you are using the STARTUP block and its GSR signal in your HDL code, then it isn't device independent anymore.
Check your sources for stuff that are Xilinx specific and replace it with the Altera equivalent, if possible.
Xilinx has a nice white paper about using resets in FPGAs. Parts of it can be applied to all FPGA designs, other parts are vendor specific. You have to sort it out by yourself.
Have a nice synthesis
Eilert











