Sign In

Don't have a Xilinx account yet?

  • Choose to receive important news and product information
  • Gain access to special content
  • Personalize your web experience on Xilinx.com

Create Account

Username

Password

Forgot your password?
XClose Panel
Xilinx Home
Reply
Regular Visitor
danbo.liang
Posts: 55
Registered: ‎03-20-2012
0

Why this naming rule will report error?

Hi All,

in my design, there are 2 similar signals, one is ssn[2] and another is ssn_2, the port define is below:

input [2:0] ssn;

output       ssn_2;

 

when synthesize, ISE will report error "the net ssn_2 is not found", why?

Expert Contributor
drjohnsmith
Posts: 917
Registered: ‎07-09-2009
0

Re: Why this naming rule will report error?

Hi

 

1001 resons,

    the most likely I gues is that  the signal is not used in th edesign,

               and is optimised away, a fairly common mistake.

 

It does raise the question of the naming convention yoru using,

     try changing ssn_2 to ssn_b

 

if ssn_b is reported as missing, its benn optimised away,

    if it reports ssn_2, oops....

 

Regular Visitor
danbo.liang
Posts: 55
Registered: ‎03-20-2012
0

Re: Why this naming rule will report error?

Hi

Actually, the signal is used.

After change ssn_2 to ssn_b, it is OK.

 

So I doubt that ssn_2 and ssn[2] are treated as same in ISE naming convention.

Expert Contributor
drjohnsmith
Posts: 917
Registered: ‎07-09-2009
0

Re: Why this naming rule will report error?

an interesting quirk

 

but at least you have a work around.