05-30-2012 10:35 PM
Dear All Hi,
I am having an RTL design and wish to choose the best Xilinx FPGA device for the same.
Rather than synthesizing my RTL design for all the FPGA devices is there an explorer tool in Xilinx which can help me choosing the best FPGA for my design?
Is there a tool which generates synthesis report for an RTL design for all the available FPGA devices or atleast device families? This would help us in choosing the best FPGA for our design.
Thanks in Advance,
05-31-2012 02:07 AM - edited 05-31-2012 02:11 AM
"wish to choose the best Xilinx FPGA device"
Most experienced engineers are content with "a good enough FPGA device".
If you don't need (much) RAM or (many) multipliers, or fancy high-speed I/O, the Spartan-6 family is probably going to be good enough.
"If it don't work in simulation, it won't work on the board."
05-31-2012 02:15 AM
Thanks for your response.
Yes indeed I agree with your opinion.
But I was trying to find out a way or method or any tool support in Xilinx ISE or XST to give a report of area, speed and performance details for my input RTL design of all the FPGA devices it has.
So, that I do not need to synthesize and check these details for each Xilinx FPGA device. It is to actually check which device will be suitable for my RTL design based upon the report generated having the area, speed and performance details on all the Xilinx FPGA devices.
Is there anyway in the tool chain I can get this report?
Thanks in Advance
05-31-2012 02:45 AM
Initially, you will probably want to choose a FPGA device family based on design specifications (type of high speed transceivers, number of I/Os, external memory requirements, operating frequency, cost). You can then synthesise your design for the largest device in that family. The report will tell you how many resources your design required (LUTs, FFs, BRAMs, DSPs, DCMs, etc.). Look at the FPGA family table to find the smallest part that satisfies your I/O requirement and contains the required number of these resources, plus a bit of margin. Synthesise for that part, and you're done (did you meet the cost requirement?)
I don't think there's an automated way to get the tools to tell you this, but don't forget that the design itself will influence the size of the FPGA required. You could do a thousand operations in parallel and require a very big part, but if latency isn't critical you could do the operations serially using only a single processing unit, perhaps at a higher speed. When you create an IP core like an FFT, there are options to control the use of BRAM and DSP blocks at the core generation stage. You would generally do this with an idea of the part you're planning to use in mind.
05-31-2012 05:23 AM
the function you are lloking for was once available for CPLDs, maybe it still is.
But CPLDs are quite simple devices compared to actual FPGAs with all their special function blocks.
As joelby explained, once you decided for a FPGA family you make a test synthesis on the largest device and compare the synthesis results with the family data sheet. There's always a ressource table and a package selection table. Looking up the best suited device there is done faster than any tool can provide the same information.
Have a nice synthesis
06-17-2012 05:36 AM
Here you need to choose your own device according to the nature of your application and you have to synthesize your own RTL on the devices that you think to be your kind and choose amond it which gives the suitable result, no as such tools are available which will give implicit suggesstions.