Tank you so much for the reply, could you give me any hit on how to arbitrate?
Maybe I nedd to give more details:
I am using a Digilent Genesys board (virtex 5) BPIU configuration. I download the bitstream and program the flash memory with the xilinx usb cable.
Once the partial bitstreams are downloaded in the flash memory I trigger the multiboot operation with one dip switch on the bord.
In UG191 I found this:
Readback CRC logic runs under these conditions:
- Any configuration operation must finish with a DESYNC command to release the
configuration logic. If a DESYNC command is not issued, the readback CRC logic
cannot access the configuration logic and cannot run. The DESYNC command resets
the readback CRC circuit and clears all error conditions and flags.
-In addition, the JTAG instruction register (IR) must not contain any configuration
instructions (CFG_IN, CFG_OUT, or ISC_ENABLE). When these instructions are
present, at any time, the readback CRC logic can not access the configuration logic
and cannot run. Any configuration operation performed via the JTAG interface
should finish by loading the IR with a value other than these three configuration
instructions.
Do I need to meet those conditions toofor PR with multiboot and ICAP? Do those conditions run automatically or I have to implement them?
thanks,
