Sign In

Don't have a Xilinx account yet?

  • Choose to receive important news and product information
  • Gain access to special content
  • Personalize your web experience on Xilinx.com

Create Account

Username

Password

Forgot your password?
XClose Panel
Xilinx Home
Reply
Xilinx Employee
chenweit
Posts: 119
Registered: ‎10-06-2011
0

Re: Partial reconfiguration using Multiboot

Burak,

 

When you generate a PR bitstream, you can parse through it yourself (.bit or .rbt). The main difference you'll see is that not all config reg need to be set and your starting FAR and FDRI words can be different. In addition, you do not get GRESTORE in PR bitstream.

 

Regards,

Wei

Regular Contributor
lamonnis
Posts: 84
Registered: ‎01-13-2011
0

Re: Partial reconfiguration using Multiboot

Hi,

 

Alan and govemb, i think you are mixing 2 things.

 

For Multiboot, you must follows XAPP1100 and send the good commands (be careful about bitswapping) to do a correct Multiboot. You don't care about what ICAP does during full reconfiguration.

 

For PR, you must control and route signal to ICAP. Partial bitstream contains all ICAP need to do the partial reconfiguration. The main difficulty in fact is how to control de BPI. SEU detection is just to keep CCLK activ because BPI control signals are "clocked" on the CCLK even if  it is in asynchronous mode.

 

I wrote a publication for the next Xcell journal (Q2 2012) about the hardware PR design with XCF32P. Perhaps you will find informations in it.

 

Lamonnis

 

 

Super Contributor
rikusleroux
Posts: 123
Registered: ‎05-21-2009
0

Re: Partial reconfiguration using Multiboot

Hi Lamonnis,

 

Good to hear form you again. Hope you are doing well. I'm looking forward to reading your publication in the next XCell journal.

 

Regards