Hierarchical Design

[alan.gjuarez]

Hello,

I am implementing a Partial Reconfiguration system following Partial Reconfiguration of a  Processor Peripheral on a Digilent Genesys board (virtex 5). I got it to work but I have a few questions:

1. Why do we have to program the FPGA with the download.bit via a PROM file? and why is it that if  I program the FPGA directly with download.bit, HWICAP doesn't initialize?

2. Do we have to start storing the partial bitstreams in Flash after considering  the size of download.bit or the size of the PROM file created with downloadbit? In Partial Reconfiguration of a  Processor Peripheral, the partial bitstreams are stored after the address 0x01f00000. But from address 0x0 to 0x01f00000 there is way more space necessary to store either download.bit or the PROM file. Do we have to reserve a certain amount of memory before we store the partial bitstreams?

3. In Partial Reconfiguration of a  Processor Peripheral, they allocate 0x20000 space for each bitstream but again, that space is much bigger than the minimum necessary to store each bitstream (40 KB). Do we have to reserve a certain amount of memory between each bitstream? The partial bitstreams of my design are arround 2 KB, I have tried to allocate 0x200 space for one but the configuration doesn´t work. If I allocate 0x20000 it works.

Thank you in advance,

Alan

[parimalp]

Alan,

1. Why do we have to program the FPGA with the download.bit via a PROM file? and why is it that if  I program the FPGA directly with download.bit, HWICAP doesn't initialize?

PROM is available upon power-up.  So if the configuration file (download.bit) is already in PROM then it will boot from there.  If mode pins are 101 then ICAP can not be initialized.  For PROM bootup it is not in 101 and hence it initializes, whereas for JTAG you put it in 101 and hence it may fail.

2. Do we have to start storing the partial bitstreams in Flash after considering  the size of download.bit or the size of the PROM file created with downloadbit? In Partial Reconfiguration of a  Processor Peripheral, the partial bitstreams are stored after the address 0x01f00000. But from address 0x0 to 0x01f00000 there is way more space necessary to store either download.bit or the PROM file. Do we have to reserve a certain amount of memory before we store the partial bitstreams?

I will get back to you on this

3. In Partial Reconfiguration of a  Processor Peripheral, they allocate 0x20000 space for each bitstream but again, that space is much bigger than the minimum necessary to store each bitstream (40 KB). Do we have to reserve a certain amount of memory between each bitstream? The partial bitstreams of my design are arround 2 KB, I have tried to allocate 0x200 space for one but the configuration doesn´t work. If I allocate 0x20000 it works

Note that 0x200 is just 512 bytes whereas your partial bitfile is 2 KB so obviously it won't work.

[alan.gjuarez]

Thanks a lot for the answers parimalp. You cleared up my first questions and I hope you can clear up for me the second question as well.
Regarding the third question I meant to write 0x2000 (which is 8192 bytes) instead of 0x200.