Implementation

[15071976]

I have a problem with my UCF file (ISE 10.1.03 Virtex5 XC5VLX50T). I have some instance in my top level VHDL file:

I32 : BT656_IN_OUT

      PORT MAP (

         BT656_In      => BT656_IN,

         C_HD_In       => c_out,

         Y_HD_In       => y_out,

         H51_Video_Out => H51_VDTI,

         CLK           => H51_VICLK_internal,

         HD_SD         => H51_CLK_SEL

      );

I30 : ChangeEndian

      PORT MAP (

         ADR_IN  => xps_epc_0_PRH_Addr_pin,

         GPIO    => GPIO_GPIO_IO_O_pin,

         H51_CS  => dout16,

         ADR_OUT => H51_ADR_internal

      ); 

In my UCf file I have to following lines:

INST "I32" AREA_GROUP = GROUP0;

INST "I30" AREA_GROUP = GROUP0;

When I translate I get the following errors:

ERROR:ConstraintSystem:59 - Constraint <INST "I32" AREA_GROUP = GROUP0;>

   [MainEntity.ucf(135)]: INST "I32" not found.  Please verify that:

   1. The specified design element actually exists in the original design.

   2. The specified object is spelled correctly in the constraint source file.

ERROR:ConstraintSystem:59 - Constraint <INST "I30" AREA_GROUP = GROUP0;>

   [MainEntity.ucf(136)]: INST "I30" not found.  Please verify that:

   1. The specified design element actually exists in the original design.

   2. The specified object is spelled correctly in the constraint source file.

I checked the instance names of the instance also after synthesis. The  instance names are correct.

Maybe anyone know what could be the problem.

Thanks. 

[15071976 · Accepted solution]

Problem solved! You must activate KEEP_HIERARCHY for the appropriate instances.

[mwinder]

Hello,

I am glad that you have overcome your error and you have helped me to get a little farther in accomplishing partial reconfiguration.  However, I am getting a rather menacing error when running ExploreAhead.  Although I have clearly included aread groups for each module in my design, ExploreAhead is complaining that I have not inculded AREA_GROUP constraints.  The error is "ERROR:Map:95 - Every module in the design should have an AREA_GROUP property...".  This error prevents me from reaching the place and route phase.  Could you offer me any advise?  I am more than willing to provide code for you to review.

Thanks,

Marlon

[icefish711]

hi, did you solve this problem? I use ISE10.1 and planahead10.1 encounter the same problems.

the problem is:

----

ERROR:Map:95 - Every module in the design should have an AREA GROUP property.