Implementation

[juansiahaan]

Hi everyone,

I'm having this module for my project. When I synthesized the module, it is said that the number of used DSP48A1s is 31 out of 32. There's no problem in this phase.

However when I tried to map the design, there were errors saying:

ERROR:Place:543 - This design does not fit into the number of slices available
   in this device due to the complexity of the design and/or constraints.
ERROR:Place:120 - There were not enough sites to place all selected components.
   Some of these failures can be circumvented by using an alternate algorithm
   (though it may take longer run time). If you would like to enable this
   algorithm please set the environment variable XIL_PAR_ENABLE_LEGALIZER to 1
   and try again 
ERROR:Pack:1654 - The timing-driven placement phase encountered an error.

 The I looked to the detailed mapping report and I found this:

ERROR:Place:543 - This design does not fit into the number of slices available
   in this device due to the complexity of the design and/or constraints.

   Unplaced instances by type:

     DSP48A1    9 (29.0)

   Please evaluate the following:

   - If there are user-defined constraints or area groups:
     Please look at the "User-defined constraints" section below to determine
     what constraints might be impacting the fitting of this design.
     Evaluate if they can be moved, removed or resized to allow for fitting.
     Verify that they do not overlap or conflict with clock region restrictions.
     See the clock region reports in the MAP log file (*map) for more details
     on clock region usage.

   - If there is difficulty in placing LUTs:
     Try using the MAP LUT Combining Option (map lc area|auto|off).

   - If there is difficulty in placing FFs:
     Evaluate the number and configuration of the control sets in your design.

   The following instances are the last set of instances that failed to place:

   0. Placer RPM "Ppc" (size: 9)
      DSP48A1 XLXI_12/LP/blk00000003/blk00000034
      DSP48A1 XLXI_12/LP/blk00000003/blk0000002c
      DSP48A1 XLXI_12/LP/blk00000003/blk0000002d
      DSP48A1 XLXI_12/LP/blk00000003/blk0000002e
      DSP48A1 XLXI_12/LP/blk00000003/blk0000002f
      DSP48A1 XLXI_12/LP/blk00000003/blk00000030
      DSP48A1 XLXI_12/LP/blk00000003/blk00000031
      DSP48A1 XLXI_12/LP/blk00000003/blk00000032
      DSP48A1 XLXI_12/LP/blk00000003/blk00000033

 How can I solve that? I tried to set XIL_PAR_ENABLE_LEGALIZER to 1 but it wasn't succcesful. Is it right if I increase the useage of DSP slice in that block (the LP block) so that the whole DSP48A1s are used?

Or does anyone have any other suggestion?

Thanks and regards,

Juan

[juansiahaan · Accepted solution]

It's solved....I decided to reduce the number of DSP48A1s...

[bwade]

If there is any cascading between DSP48s, then the placement problem is not as simple as having X number of DSP48 sites available. The cascaded DSP48s need to be aligned in the same column.

[juansiahaan]

Hi,

I do have several type of filters implemented at the same time, so how do I know that they're aligned in the same column or how do I make them aligned in the same column?

Thanks and regards,

Juan

[juansiahaan]

what I mean is that there are several blocks using several filters such as

Filter A --> Filter B --> Filter C

and it seems only one of them fails to be placed.

One of the blocks need 10 DSP48A1s. However, 9 of which can't be placed. So how can they be placed properly?

[bwade]

You can try floorplanning the DSP48s using PlanAhead to see if you can find a placement that satisfies all the cascading requirements. That may not be possible even though you have fewer components than there are sites available. First check whether the longest chain is taller than a single column can support. Then check to see if the necessary combinations are possible to entirely fill columns.