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Super Contributor
radnorc
Posts: 109
Registered: ‎07-14-2011
0

Unconnected pins in FPU multiplier, V5.0

[ Edited ]

device: xc6slx150t, tools: ISE 13.4

 

 

Right now i decided to use single precision FPU multiplier, v5.0, without DSPs. I have 8 of them, here is what tools throw at me for each multiplier:

 

NgdBuild:443 - SFF primitive 'matched_filtering_engine/mac_array[0].multiplier/blk0000057b' has unconnected output pin

NgdBuild:443 - SFF primitive 'matched_filtering_engine/mac_array[0].multiplier/blk0000057c' has unconnected output pin

NgdBuild:440 - FF primitive 'matched_filtering_engine/mac_array[0].multiplier/blk000008a3' has unconnected output pin

 

I dont understand why. Here is how multiplier instantiated:

multiplier : mult2 -- no DSPs, 8 clocks
		port map (
			a => s_in,
			b => pt_in,
			operation_nd => mult_nd(index),
			operation_rfd => mult_rfd(index),
			clk => clk,
			sclr => '0',
			ce => '1',
			result => mult_out(index),
			rdy => mult_rdy(index));

 All signals are actually connected to specific blocks.

 

i tried all kinds of things, removinf rfd output, sclr input, adding error indication outputs etc... it still spits out these warnings about unconnected output pins..

 

p.s. the multiplier using 4 DSP48s worked fine. I have no idea whats wrong with this one?

 

 

Moderator
ambrosef
Posts: 95
Registered: ‎02-11-2010
0

Re: Unconnected pins in FPU multiplier, V5.0

NGDBuild:443  is issued when NGDBuild detects that a logical block in the design has pins which are floating.

 

Solution 1:
If your design uses IP cores and the SFF in question is associated with such a core, this may be normal.  In some scenarios, IP cores leave certain pins floating with the expectation that they will be trimmed during MAP.  Please consult Answer Record 21718 for more details which also deal with NGDbuild:440.

 

Solution 2:
If the SFF primitive in question is part of a portion of your design which is critical, it is possible that the upstream synthesis tool is optimizing the design in such a way that the downstream logic from this SFF has been trimmed out of your design.  Please consult your synthesis report to determine if this is what is happening.