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Re: Weird Map crash only when instantiat ing Hard Macros created in FPGA editor 11.4 (and not 9.2)
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03-03-2011 04:08 PM
I hope this helps as I had a long hell of time struggling with this myself and 12.3 didn't really help either.
Re: Weird Map crash only when instantiat ing Hard Macros created in FPGA editor 11.4 (and not 9.2)
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04-23-2012 05:20 PM
hallo
I have this error: FATAL_ERROR:GuiUtilities:WinApp.c:693:$Revision - This aplication has discovered an exceptional condition from which it cannot recover.
the code is very simple:
library IEEE;
use IEEE.STD_LOGIC_1164.all;
use IEEE.STD_LOGIC_ARITH.all;
use IEEE.STD_LOGIC_UNSIGNED.all;
entity NUMARATOR is
generic(BITI:natural);
port(CLOCK,RESET:in std_logic; LIMITA:in std_logic_vector(BITI downto 0);
FRECVENTA:inout std_logic);
end NUMARATOR;
architecture NUMARATOR of NUMARATOR is
signal COUNT:std_logic_vector(BITI downto 0):=(others=>'0');
begin
process(CLOCK,RESET)
begin
if RESET='1' then
COUNT<=(others =>'0');
FRECVENTA<='1';
elsif CLOCK='1' and CLOCK'EVENT then
if COUNT=LIMITA then
COUNT<=(others =>'0');
FRECVENTA<=not FRECVENTA;
else
COUNT<=COUNT+1;
end if;
end if;
end process;
end NUMARATOR;
-->>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>
library IEEE;
use IEEE.STD_LOGIC_1164.all;
use IEEE.STD_LOGIC_ARITH.all;
use IEEE.STD_LOGIC_UNSIGNED.all;
entity SISTEM_DE is
port(SEL,CLOCK,RESET,TACT:in std_logic;
VITEZA:in std_logic_vector(1 downto 0); --"00" = 1 sec; "01" = 2 sec; "10" = 3 sec; "11" = 4 sec;
LEDURI:out std_logic);
end SISTEM_DE;
architecture ILUMINARE_VARIABILA of SISTEM_DE is
component NUMARATOR
generic(BITI:natural);
port(CLOCK,RESET:in std_logic; LIMITA:in std_logic_vector(BITI downto 0);
FRECVENTA:inout std_logic);
end component;
signal REGISTRU:std_logic_vector(1 downto 0):=(others=>'0');
signal COUNT_25V:std_logic_vector(4 downto 0):=(others=>'0');
signal COUNT_25:std_logic_vector(4 downto 0):=(others=>'0');
signal COUNT_5:std_logic_vector(2 downto 0):=(others=>'0');
signal UP_DOWN:std_logic:='0'; --'0' up & '1' down
signal SEC_00004:std_logic:='1'; --1/2500 =0.0004
signal SEC_002:std_logic:='1'; --0.5/25 =0.02
signal SEC_004xV:std_logic:='1'; --(1/25)*V =0.04*V
signal SEC_05:std_logic:='1'; --1/2 =0.5
signal SEC_1:std_logic:='1';
signal SEC_2:std_logic:='0';
signal SEC_5:std_logic:='0';
signal X:std_logic;
signal Y:std_logic;
begin
numarator_12_500_000:NUMARATOR generic map(23) port map(CLOCK,RESET,"101111101011110000011111",SEC_05)
secunda_1:SEC_1<='1' when RESET='1' else not SEC_1 when SEC_05='1' and SEC_05'EVENT; -- _|¯|_|¯| in 2 secunde
secunda_2:SEC_2<='0' when RESET='1' else not SEC_2 when SEC_1='1' and SEC_1'EVENT; -- _|¯|_|¯| in 4 secunde
numarator_5:process(SEC_1,RESET) -- _ _ _ _|¯|_ _ _ _|¯| in 10 secunde
begin
if RESET='1' then
COUNT_5<=(others =>'0');
SEC_5<='0';
elsif SEC_1='1' and SEC_1'EVENT then
if COUNT_5="100" then
COUNT_5<=(others =>'0');
SEC_5<='0';
elsif COUNT_5="011" then
SEC_5<='1';
COUNT_5<=COUNT_5+1;
else
COUNT_5<=COUNT_5+1;
SEC_5<='0';
end if;
end if;
end process numarator_5;
flash:X<=(SEC_2 or SEC_5) nand not SEC_05; -- _ _ _ _ _|¯|_|¯|_ _ _ _ _|¯|_|¯|_|¯|_|¯|_|¯|_|¯|_ _ _ _ _|¯|_|¯|_ _ _ _ _|¯|_|¯|_ _ _ _ _|¯|_|¯|_ _ _ _ _|¯|_|¯|_|¯|_|¯|_|¯|_|¯|_ _ _ _ _|¯|_|¯| in 18 secunde
--------------------------------------------------
memorie_1x2:REGISTRU<=(others=>'0') when RESET='1' else VITEZA when TACT='1' and TACT'EVENT;
numarator_10_000:NUMARATOR generic map(13) port map(CLOCK,RESET,"10011100001111",SEC_00004); --400 us
numarator_25:NUMARATOR generic map(4) port map(SEC_00004,RESET,"11000",SEC_002); --20 ms
numarator_4V:NUMARATOR generic map(1) port map(SEC_002,RESET,REGISTRU,SEC_004xV); --viteza
numarator_25duty:process(SEC_00004,RESET) --numara modulo 25 de 100 de ori pe secunda
begin
if RESET='1' then
COUNT_25<=(others =>'0');
elsif SEC_00004'EVENT and SEC_00004='1' then
if COUNT_25="11000" then
COUNT_25<=(others =>'0');
else
COUNT_25<=COUNT_25+1;
end if;
end if;
end process numarator_25duty;
numarator_25V:process(SEC_004xV,RESET) --numara modulo 25 in VITEZA+1 secunde
begin
if RESET='1' then
COUNT_25V<=(others =>'0');
UP_DOWN<='0';
elsif SEC_004xV='1' and SEC_004xV'EVENT then
if UP_DOWN='0' then
if COUNT_25V="11000" then
UP_DOWN<='1';
else
COUNT_25V<=COUNT_25V+1;
end if;
else
if COUNT_25V="00000" then
UP_DOWN<='0';
else
COUNT_25V<=COUNT_25V-1;
end if;
end if;
end if;
end process numarator_25V;
PWM:Y<='1' when COUNT_25<COUNT_25V else '0'; --PWM
--################################################
multiplexor_2_1:LEDURI<=X when SEL='0' else Y when SEL='1';
end ILUMINARE_VARIABILA;
what is wrong?











