It seems that the Memory Interface Generator Core does not support multiple controllers for DDR2 memories, but it does for DDR3 or other memories.
There is no single "MIG core". MIG will generate completely different sets of code, depending on the target device family. When discussing what MIG will (or will not) support, you must specify the target device family. It wouldn't hurt to also specify the version of MIG which is being discussed.
-- Bob Elkind
SIGNATURE:
README for newbies is here: http://forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369
Summary:
1. Read the manual or user guide. Have you read the manual? Can you find the manual?
2. Search the forums (and search the web) for similar topics.
3. Do not post the same question on multiple forums.
4. Do not post a new topic or question on someone else's thread, start a new thread!
5. Students: Copying code is not the same as learning to design.
6 "It does not work" is not a question which can be answered. Provide useful details (with webpage, datasheet links, please).
7. You are not charged extra fees for comments in your code.
8. I am not paid for forum posts. If I write a good post, then I have been good for nothing.
