MIG (Memory Interface Generator)

[jnewcomb]

I have boards where PHY_INIT is valid and give no errors when runnning the test bench code under MIG 2.3 and ISE 10.1. I have since implemented a design under MIG 3.3 and ISE 11.4 and PHY_INIT never become valid. In fact it never gets to stage 3 of the calibration. Has anyone else experienced a similar problem with MIG 3.3 ? All of the parameters are exactly the same between the 2 implementations.

[gszakacs]

I have recently had the same experienced this same issue.  I have a design built with

MIG 2.3 for Virtex 5 and DDR2.  I ran MIG 3.3 using the new feature of specifying the

pins.  It also fails to assert phy_init_done.  For the moment I've gone back to the

MIG 2.3 implementation, since this still seems to run under ISE 11.5

[lacirta]

Hi!

For me MIG 3.3 works perfectly, but i use the ucf constrains generated with the MIG 2.3 version. The MIG 3.3 coregen template does not accept my DDR2 pin assignment...

[dann]

The first thing I would do with your new design is to ensure that it works with the Example Design.  Use the Example Design and run the simluation and Implement it to ensure that it works out of the box.  If this works, compare it to how you are using it with your own design to see any possible mistakes you may have made.