New Users Forum

[electricflow]

Is this a poor device for the application?  Would I be better off using a FPGA from the vertix family? 

I am also reading Xapp1064, For anyone else that might be looking for information on this topic. 

[austin]

e,

Only once you have reviewed all the data sheets and have tried to put the design in this part will you know if this is OK, or you need a more capable part.

Often the choice of part is based on cost alone, so if it will not work in a S6 at first, more effort is used to make it work in the S6!

On the surface, not knowing everything, this is what I would call a moderate effort to work in S6, with an average effort to work in a V6 (or K7).

The other factor is how much 'stuff' needs to go into the same part?  How fast does that have to run?  You need to start writing your VHDL/verilog, and trying to synthesize, place, and route it on the target parts.  Start small, with the least expensive parts, and then decide which way to go.  You do not finish the layout the pcb (do not get boards) until you have a design which has no errors, meets timing, and runs without errors in the simulator.

[eteam00]

NOTE: updated and corrected per Ed's comments in following post.

Is this a poor device for the application?

The Spartan-6 device is easily capable of handling the 600Mb/sec interface.

The SP-605 board design FMC ADC add-on module, judging by the observations made by Ed McGettigan, is may be a poor choice.

Would I be better off using a FPGA from the vertix family?

Virtex-5 or Virtex-6 would also be suitable, based on the limited information you have posted.

I am also reading Xapp1064, For anyone else that might be looking for information on this topic.

XAPP1064 and XAPP495 are both worth reading for Spartan-6 serial IO design examples.  Remember to separate the board layout (device pinout) problem with SP-605 from the device family capabilities of Spartan-6 (or Virtex-5/6).

-- Bob Elkind

[mcgett]

> The SP-605 board design, judging by the observations made by Ed McGettigan, is a poor choice.

This isn't the SP605 board design it is the FMC module.  A correctly designed FMC module would have no issues implementing the 600 Mb/s interface.  The interface may still work (you should ask the vendor that sold you the module for a SP605 reference design), but it will require additional work as the standard reference material and CoreGen interface were not designed to work with the forced pinout from the FMC module.

[eteam00]

Thanks for the correction, Ed.  My previous post has been updated.

-- Bob Elkind

[electricflow]

The FMC Module is to go from the Analog to Digital Evaluation Board to the SP605.  The adapter board was not designed specifically to work with the SP605 board.  In the end the A2D and the FPGA will be on the same board, and I will have more flexibility in my choices.  I could Also design my own adapter board prior to making a combined board.  

Thanks again for the Info!