05-13-2012 03:21 PM
I am working on a partial reconfiguration project,
firstly doing a simple PR with a small region on Virtex 5 LX110t using ICAP,
bitstream is fed to icap from BRAM, clock is about 33 MHz.
icap does not give any output (always 0), i can't see 9F and DF transitions.
Here are the chipscope shots:
full scale of PR cycle
sync word(5599AA66) is given
end of PR cycle
icap does not give response and reconfiguration does not work
can anyone help about the mistake
Solved! Go to Solution.
05-18-2012 02:29 AM
i still could not solve the problem,
downloading partial bitfile from JTAG works, but ICAP doesn't give output, always 0,
ICAP is ICAP_X0Y1, so it is correct,
also tried nededge and podedge clock for input signals of ICAP ...
05-22-2012 04:32 AM
I am trying to do the same thing as you. How did you convert the bit file for storage in BRAM? Based on my searches and the limited information on ICAP, I am not sure ICAP is capable of handling this type of self-reconfiguration from BRAM. Do you have example code of how you connected the ICAP to the BRAM?
05-28-2012 01:47 PM
Also problem is solved,
Persist option of Bitgen was wrong, due to not using PROM for bitstream storage, but using BRAM,
but could not clearly understand why,
as i know Persist selects configuration logic ports for SelectMap or other configuration interfaces,
i would appreciate, anyone sees the issue and enlighten me
02-05-2013 12:59 AM
Does ICAP support non-continuous data loading like SelectMap,
if so, is it same with SelectMap, can i find a document about it?
Configuration user guides mention about SelectMap but not for ICAP
appreciate for any help,