New Users Forum

[noorulazim]

I designed Single Carrier QPSK Transmitter using Verilog. In simulation my whole desing work completly. but when i generate bit file for this design and download it to FPGA (ML605 Development ki) using chip scope pro then no signal will be displayed.

[iguo]

What kind of simulation did you run? With Behavior simulation only you might not get things running as expected. If DONE pin is high, this issue has no relationship with bit or configuration. You should check your design carefully, such as timing.

[gszakacs]

If ChipScope finds the core, then the FPGA is running from the .bit file, otherwise you will not

get a connection.

It's not clear what you mean by "no signal will be displayed" in ChipScope.  Can you get

ChipScope connected?  Can you set up a trigger?  If you click the "Trigger and stop"

button can you see signals in a window (whether or not they are toggling)?

-- Gabor

[noorulazim]

ChipScope is connected but the signal displayed on chipscope is not QPSK modulated signal. it is simpl sine wave. my output signal should be qpsk modulated signal