New Users Forum

[rogerk8]

Hi!

I would also like to attach this final thing which is the preliminary layout for my CPU. I really don't know exactly how to proceed but I actually think that it's possible to proceed wiring the CPU without anymore wiring data. Just wire and check each wire as you are wiring (IC12:1 to K3:12 etc). The LED's and resistors are consecutive with the first one being the highest (1:16 with the LED anodes at the dot). What do you think? Is it now possible to wire it all without flaws?

Best regards, Roger

[eteam00]

This is a bit late, but perhaps better late than never...

• You could save yourself some SSI (glue) logic by replacing MSI devices (e.g. HC374s) with programmable logic (PLDs in the form of PALs/GALs).  With PLDs, you don't need to use glue logic for polarity inversions (e.g. IC20).  With PLDs, you can reduce wiring and consolidate S-R latches and decode logic (IC8,9,10,13,14,22,23).

• SW1 is wired so that the clock pulse rising edge occurs when SW1 button is pushed, rather than when SW1 button is released.  You may prefer the rising edge to occur on pushbutton release, rather than push.

• You can modify the IC8, 9 circuits slightly to use SW1 to act as a momentary RUN/PAUSE button.  Split R6 (which is a variable resistor, right?) into two Rs (one fixed, one variable?).  Connect IC9.6 or IC9.3 to the middle of the two halves of R6, through a 1N4148 (or BAT54) diode.  When this midpoint is pulled LOW by IC9, oscillation will pause.  The circuit you have now provides RUN and SINGLE_STEP.  The change will give you RUN, RUN_with_momentary_PAUSE, and SINGLE_STEP.

• You should add a 33-ohm series R at the K1 common pin.  This will prevent double-pulses from ringing clock edges.

• Connect some unused IOs to connector headers, for either diagnostic purposes or for unanticipated additions to your design.

• Colour code your wires by signal function (or power rail).

• Extra bonus feature:  add a cheap 20mm speaker, for beeps or clicks from the processor.  LEDs are nice (and you have tons of them), but a beep or click can be noticed even when you are looking at the oscilloscope or computer display rather than the circuit board.

-- Bob Elkind

[rogerk8]

Hi Bob!

I am so honored that you have put down so much work into helping me! I actually thought that me attaching more stupid pictures just would make you think I was too much. I am almost crying with appreciation!

I am very interested in your version of the RUN, RUN_with_momentary_PAUSE, and SINGLE_STEP feature. I do not however really know what you mean. Could you perhaps send me a simple drawing?

As it is now I have a DC-clock function which I have called "CYCLE" and a multivibrator function (IC8) which I can choose when (read if) things are going well. I then just move the K1-switch (read jumpers) to enable automatic multivibrator use. And due to me using standard IC-sockets even for the descrete components I may, in the hopefull long run, even change the capacitor (C8) enabling a quite high frequency of operation.

As aways Bob, take care!

Best regards, Roger

[eteam00]

I am very interested in your version of the RUN, RUN_with_momentary_PAUSE, and SINGLE_STEP feature. I do not however really know what you mean. Could you perhaps send me a simple drawing?

R6a varies the step rate.

When IC9.6 pulls LOW, stepping (oscillating) in IC8 is paused.

When IC9.6 pulls HIGH, IC8 steps normally.

• Split R6 into two Rs, one fixed, one variable.
• Connect IC9.6 to the middle between R6a and R6b, through a 1N4148 (or BAT54) diode.
• When this midpoint is pulled LOW by IC9, oscillation will pause.
• The circuit you have now provides RUN and SINGLE_STEP.
• The change will give you RUN, RUN_with_momentary_PAUSE, and SINGLE_STEP.

-- Bob Elkind

[rogerk8]

Hi Bob!

I have now reviewed your beautiful hand-made drawing. Thanks a lot :-)

This is what I understand:

Pulling IC9.6 low (i.e using my old manual single step feature) halts the oscillator IC8_A with a forced high output transition. If however the status output for the oscillator already is high, nothing will happen except for a prolonged high to low transition when I realease the switch.

So I have only two modes. RUN (i.e leaving my switch as is) and PAUSE (turning the switch on i.e forcing IC9.6 low and yielding a high clock/IC8_A output)

While all change of states in the CPLD occures at low-to-high transitions this is not that good. I am however thinking of adding an inverter after IC8_A in your drawing yielding a RUN-function as always and a PAUSE-function which will force the clock going low and thereby not yielding a low-to-high transition and thus a change of state.

I got to be stupid because I cannot se how your beautiful drawing also will enable SINGLE_STEP. All I can see is RUN and RUN_with_momentary_PAUSE.

RUN_with_momentary_PAUSE is however extremely attractive! Because then I may run a very slow clock signal and pause whenever status looks suspicious and continue afterwards.

Best regards, Roger

[eteam00]

I got to be stupid because I cannot se how your beautiful drawing also will enable SINGLE_STEP.

You still need to move the K1 jumper for single-step.  The circuit change adds a PAUSE to the RUN mode.

-- Bob Elkind

[rogerk8]

Love you Bob!

I have looked at your comments. These are my reflections:

• You could save yourself some SSI (glue) logic by replacing MSI devices (e.g. HC374s) with programmable logic (PLDs in the form of PALs/GALs).  With PLDs, you don't need to use glue logic for polarity inversions (e.g. IC20).  With PLDs, you can reduce wiring and consolidate S-R latches and decode logic (IC8,9,10,13,14,22,23).

1. At this stage my goal is not to design a compact CPU. I would just like it to work. And I think I am very confident with descrete HCMOS-gates because I have used them before. Any other type of modern circuitry would just make me uncertain.

• SW1 is wired so that the clock pulse rising edge occurs when SW1 button is pushed, rather than when SW1 button is released.  You may prefer the rising edge to occur on pushbutton release, rather than push.

1. This comment I do not really understand. For me it is obvious that when I turn on the switch I want the CPU to enter the next state. Why should it be the other way around?

• You should add a 33-ohm series R at the K1 common pin.  This will prevent double-pulses from ringing clock edges.

1. This I will do. I don't know why I should, but I will take your experienced word for it. Thanks for the tip!

• Connect some unused IOs to connector headers, for either diagnostic purposes or for unanticipated additions to your design.

1. Here I have no clue whatsoever what you mean :-) What is connector headers?

• Colour code your wires by signal function (or power rail).

• Extra bonus feature:  add a cheap 20mm speaker, for beeps or clicks from the processor.  LEDs are nice (and you have tons of them), but a beep or click can be noticed even when you are looking at the oscilloscope or computer display rather than the circuit board.

1. These are very good tips, thanks!

Best regards, Roger

[rogerk8]

You are so right! Sometimes I am really stupid :-) I will incorporate your design immediatelly. Thank you very much!

[rogerk8]

Hi Bob!

I am attaching my new designs. First comes the schematic where I have incorporated your great idea. The other is just the equivalent layout where I have moved around IC10 and added K6 only. I feel however that it is still somewhat impossible to just use what I have written and successfully hardwire it all. But I think I am getting there :-)

Best regards, Roger

[rogerk8]

And here's the layout.