ISE can take an EDIF netlist as source, so you can build the FPGA from that. If you need to send the equivalent NGC somewhere, it is an intermediate output of the Translate (?) process.
------------------------------------------ "If it don't work in simulation, it won't work on the board."
but the ngc file is one of the type of input to translate process and not the output right?!
Basically i want to do a fpga netlist simulation. I found that it can be done using ngc file as input and could not find whether i can use edif file for that or not. So can you please suggest me regarding this?
