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Visitor
hemal239803
Posts: 7
Registered: ‎03-28-2012
0

example for chipscope vio

hello,

 can anybody provide some snapshot or screenshot or ppt showing  simple example f using chipscope vio?? 

such as half_adder of full_adder.

i have leart to generate the icon and vio core but i dont understand how to use it using chipscope pro generatior.

so somebody please provide me example showing the result obtained using chipscope vio

i have learnt about chipscope vio but not fully confident that i can use this tool.

 

Xilinx Employee
Xilinx Employee
ywu
Posts: 2,861
Registered: ‎11-28-2007
0

Re: example for chipscope vio

For the Chipscope Generator flow, you instantiate both icon and vio core in your RTL like below. YOu can then connect vio_syncout (driving other signals in your design) and vio_syncin (monitoring other signals in your design) any signals you want. Say you have a 4-bit adder, you can connect vio_syncout[3:0] to the adder input 1 and vio_syncout[7:4] to the adder input 2 and connect the adder output [4:0] to vio_syncin[4:0].

 

 

        v7_icon u_icon (
            .CONTROL0 (icon_control0)
        );


       //---------------------------------------------------------
        v7_vio_256 u_vio0 (
            .CONTROL  (icon_control0), // INOUT BUS [35:0]
            .CLK      (clk200),        // IN
            .SYNC_IN  (vio_syncin),    // IN BUS [255:0]
            .SYNC_OUT (vio_syncout)    // OUT BUS [255:0]
        );

 


hemal239803 wrote:

hello,

 can anybody provide some snapshot or screenshot or ppt showing  simple example f using chipscope vio?? 

such as half_adder of full_adder.

i have leart to generate the icon and vio core but i dont understand how to use it using chipscope pro generatior.

so somebody please provide me example showing the result obtained using chipscope vio

i have learnt about chipscope vio but not fully confident that i can use this tool.

 




Cheers,
Jim