05-20-2012 06:25 AM
I Send a data in the hyperterminal through a usb_com port and connect it to sp601 board (usb input that goes to usb2uart bridge). I got at the bridge (cp2103) output the 8_bit packet but with a problem: the 1 logic was ~2.5V and when it goes down to 0 logic it was ~2V.
I think that it had something to do with my fpga design (driving to the rx_in or something) so I deleted the associated line in the UCF file but I didn't get any change.
Another info is that when I insert the design of xilinx from the flash (include a testing of the hardware) and do a UART test the '0 logic' is OK.
Does anybody have any idea?
05-20-2012 11:27 AM
In the past, I have found the documentation for the boards somewhat confusing with respect to "what is RX and what is TX". In most of the documentation, it is spec'ed from the point of the USB->UART converter chip (which makes it backwards for those of us that are FPGA centric).
For data sent by the USB->UART chip to the FPGA, the data is carried on pin K14 - this should be the FPGA input. For data sent by the FPGA to the USB->UART chip, the data is carried on pin L12 - this should be the FPGA output pin.