01-18-2010 01:02 PM
I'm using the Avnet "Xilinx® Virtex®-5 LXT/SXT PCI Express Development Kit" and trying to get xapp1052 working with it.
I was able to create the bit file without TOO many problems. I generated the PCIe core following the instructions in xapp1052 using COREgen. I threw the xapp1052 files into the directory, and changed the "xilinx_pci_exp_blk_plus_8_lane_ep_ml555.ucf" reset and clock pins, as well as the PCIe lane information to the information in the Avnet UCF. When running the perl script I selected custom, then "Endpoint Block Plus for PCI Express (Virtex-5)", then "xst_blk_plus_ml555_x8.scr" (I figured this was the closest thing to the 8 lane avnet board I'm using....), then my modified UCF file.
I program the board with the bit file created by the perl script, and then do a soft reset. The computer turns on, but nothing shows up on the monitor. I can't figure out what else to try to get this guy running. Anyone have any ideas? The mcs file I downloaded from the avnet site for PCIe boots fine (and windows recognizes it), but they don't have any DMA examples, or windows code, making it pretty useless.
Solved! Go to Solution.
02-03-2010 12:55 PM - edited 02-03-2010 12:56 PM
Got everything working. Turns out we needed to use the newest version of the PCIe plus core, 1.13.
1.12 was nothing but trouble.
Also there was a slight UCF problem with the PCI fingers. Accidently renamed them.
06-14-2012 06:16 AM
I read your post.
I have got somewhat similar problem but at more beginner level.
I want to know how to downlaod the file using PCIe Jtag interface using Impact.
Can you help me with the procedure. I know how to do that with Jtag cable, but have no clue, neither can find about doing so with Jtag cable...