06-29-2012 07:24 AM
In the "Xilinx WP384 PCI Express for the 7 Series FPGAs, White Paper" it is stated that:
"... For Artix-7, Kintex-7, and Virtex-7 devices, SR-IOV will be enabled using a partial soft
IP solution. The Physical and Datalink layers of the Integrated Block will be used with
an FPGA logic-based Transaction Layer. ..."
I was looking through the Xilinx IP solutions, but cannot find this soft IP solution above. Is it not (yet) available?
thanks and kind regards