I am making a pci-e deisgn on xupv5-lx110t(ml509) board, using ISE 13.4. xapp859 is for ml505 board with fpga chip xc5vlx50t but the fpga chip on xupv5-lx110t(ml509) is xc5vlx110t. So I am planning to do some changes to the source files. But that's the problem, the ip-core generated in the xapp859 is provided with *.ngc formate, and the pdf file provided with xapp859 do not tell how to set parameters for the fifo ip's generation. I open the ip project *.prj with CORE generator, the ip displayed in gray and I can't find the parameter. Do I need to install ISE 10.1 to do the design with pci-e?
Sorry for my bad english.
