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Sunspots, Solar Cycles, and Soft Errors
A lot of people are waiting for the beginning of cycle 24. Today, there are no sunspots. There have been many days now without any sunspots for the last six months.
Why is this of interest to FPGA device customers? As it turns out, when the sunspots are low in activity, the Sun’s magnetic fields are at their weakest, and the Earth is more prone to strikes from cosmic rays. At a solar minimum, the cosmic ray flux is about 15% stronger than it is during a solar maximum.
Cosmic rays hit the atmosphere, and create a shower of neutrons, protons, and other energetic particles. Before there were accelerators to smash atoms together, physicists did their high energy particle experiments on mountain tops, and in balloons. Even today, the energy of cosmic rays is still far far greater than that of any accelerator here in earth, including CERN. The problem is that you can’t turn them on or off.
http://www.telescopearray.org/outreach/intro.html#
Living on planet Earth, we do not think of ourselves as being affected by sunspots, but we are. There are about 12.9 neutrons passing through every square centimeter at sea level (New York City) every hour.
http://www.jedec.org/download/search/JESD89A.pdf
Soft Errors
It is now well known that as the technology went from microns to nanometers, the integrated circuits became more and more susceptible to upsets from neutrons from cosmic rays.
http://www.xilinx.com/support/documentation/white_
In the above white paper, the soft failure rates for 150, 130, 90, and 65 nm are reported for both the configuration bits, and the block RAM (BRAM).
Of interest is that starting after 130 nm, Xilinx embarked on a program to reduce the soft fail rate in each new technology, which reverses the trend if you do nothing at all.
http://www.iroctech.com/pdf/isqed2007.pdf
Slide 8 is particularly grim, if you are concerned about soft errors. In fact, I have stated that if you are really concerned about soft errors, then you have no choice but to design with a Xilinx® FPGA, where not only is the intrinsic soft failure rate low, but there are techniques that are used to mitigate, and even eliminate, the effects of soft errors.
If you are interested, your Xilinx FAE or your local Xilinx distributor FAE has presentations of soft error mitigation techniques which are commonly used in industrial, medical, wired and wireless telecom, automotive, aerospace, and defense applications.
Cycle 24: Any Day Now
So, we have seen the first “proto sun spots” of the new cycle, which are recognized by having their magnetic poles reversed from the last cycle, and starting out near the sun’s equator. Before too many more months go by, the sunspots will begin appearing again, and appearing again in numbers. The magnetic fields of the sun will again reduce the number of cosmic rays which make it to the earth; however, the difference will be only 15% or so fewer neutrons than we are getting right now.
For your spot in the sun, put in your altitude, longitude, and latitude, and see how many more (or less) neutrons per square centimeter per hour you will be enjoying.
http://www.seutest.com/cgi-bin/FluxCalculator.cgi
And to see how many cosmic rays we are getting now (or in the past), visit:
Lots of sun spots are also good for radio propagation in the 2 MHz to 30 MHz bands (amateur radio, or ‘ham radio’ HF bands), so not having any sun spots leads to some very depressed amateur radio enthusiasts.
http://www.arrl.org/tis/info/propagation.html
Austin
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kcmman
- Ken Chapman holds a first class BSc Degree with honours in Electronic and Electrical Engineering from the University of Surrey. Before obtaining his degree, he spent 4 years working in production environments, making precision instruments and working his way through all levels of a small electronics company. He spent 4 years at Racal Radar Defense Systems combining detailed digital design with all aspects of system integration. Ken joined the UK division of Xilinx in 1991, and was instrumental in developing innovative methods of implementing DSP functions in the Xilinx devices. He has filed several patents while at Xilinx, including the 'MULT_AND' gate seen in each Virtex™ and Spartan-II™ device that has made multipliers and other arithmetic functions smaller and faster.
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peter.a
- Peter Alfke joined Xilinx in 1988 as director of applications engineering. He currently serves as Distinguished Engineer in the Advanced Products Group. He graduated in electronic engineering from the Technical University in Hannover, Germany in 1957. He went on to work in telecom and computer design with LM Ericsson and Litton Industries before moving to California in 1968. He has spent forty years in Applications Engineering with Fairchild, Zilog, AMD, and now Xilinx. He holds more than thirty patents, has authored many application notes, and given worldwide seminars on digital integrated circuits. He is active in the newsgroup comp.arch.fpga.
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austin.lesea
- Austin graduated from UC Berkeley in 1974 and 1975 with his BS EECS in Electromagnetic (E&M) Theory and MS EECS in Communications and Information Theory. He has worked in the telecommunications field for 20 years designing optical, microwave, and copper- based transmission systems. He developed SONET/SDH GPS-based Timing Systems for 12 of those years. For the last ten years at Xilinx, Austin was in the IC Design department for the Virtex product line. His new role is working for Xilinx Research Labs, where he is looking beyond the present technology issues.
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