03-08-2012 09:57 AM
MicroBlaze is not so easy to use as picoBlaze. We use picoBlaze only with the ISE webpack : every student can make homework with a ISE webpack.
MicroBalze is harder to use : the XPS and SDK are not part of ISE webpack (I am not sure for the SDK under Linux)
Here is an other gap.
Place and number of LUTs are effectively important but I think that microBlaze was conceived in the spirit of speed and extendable with professional PLB bus. It is its place even if we have used it for a low speed video game where it spends most of the time to wait : not a good place for such a processor !
Because of this gap I use picoBlaze and a free AVR core : only webpack is necessary. Compiling is done with AVRSudio... Every student can install all the software for free.
Please don't think I want all for free. I can understand Xilinx policy with microBlaze. I just say we need both policies free and no-free and the free one has to evolve.
03-12-2012 12:28 AM
Did you read the datasheet that I linked?
It's a prepackage MicroBlaze with tiny peripherals and a IO bus delivered through CoreGen. It's part of WebPack.
It's free and you don't need XPS or SDK.
03-13-2012 08:52 AM
I really think the prepackaged Tiny Microblaze is a great thing, and will become a excellent replacement of Picoblaze as it is a 32bits processor and as the low cost FPGAs come with more and more FFs .
But Xilinx should do an effort regarding documention and the 'get started' with Microblaze (How to compile and to load my first Microblaze led blink C program).
The good point for the Picoblaze is we can find a lot of concret examples.
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03-19-2012 05:44 AM
Including an offset to a pointer in your architecture is a nice feature but it also implies the inclusion of logic in the path to the memory address inputs. Whilst an adder is physically quite small, the corresponding increase in propagation delay would result in a lower clock frequency performance.
There already was a long discussion about this in this previous thread including my modification to the original KCPSM6 code for it:
My conclusion was that it costs no performance, but only some resources.
With this extension of accessing scratchpad memory with a small index it becomes possible to calculate the address of a variable first using the ALU and then access it to perfom the requested operation. It is also usefull for small stack offsets and struct offsets. With this extension I do not see the need for ADDN anymore.
03-19-2012 06:09 AM
Why do we employ KCPSM3 instead of KCPSM6?
3) as we perform all our development effort in Linux OS, we needed a linux-enabled assembler. Until our compiler tool-chain was completed, we used the open-source picoasm. I think there was no assembler for KCPSM6 that can be used in Linux.
What is missing in PicoBlaze to enable better compilers?
The COMPARECY instruction in KCPSM6 is a fine step, but what I've run into when implementing the compiler is an efficient support for software stack spilling. Right now, you have to use 3 instructions (LOAD, ADD, STORE) to push/pop a single value from a software stack. Moreover, this 3-instruction 'stack spilling code' is not inert: it modifies FLAGS due to the ADD instruction. This turned out to to be a great problem for the LLVM compiler framework, because the optimizing compiler sometimes wants to insert the spilling code in the middle of an ADD->ADDCY chain (or SUB->SUBCY), hence potentially corrupting processor state.... All this is explained in detail in the documentation: http://sp.utia.cz/smecy/pblaze-cc-v2/Users_Guide/i
For small cores with no (efficient) data stack it can be very effective to let go of one C requirement that is often not needed: reentrancy. This is what SDCC (http://sdcc.sourceforge.net) does by default for many of its targets. It allocates all local variables to fixed memory places making them something like static variables. Overlaying tries to reclaim some of the wasted memory. If the user really needs reentrancy it can be added with the function modifier __reentrant or a global option. Is the pblaze-cc doing something similar or are all function reentrant and thus all parameters and local variables placed on the stack?
03-19-2012 10:57 AM
I think the ADDN instruction is needed even when the reg+offs addressing mode is available as we have to cater for the case when a large offset cannot be folded into an instruction (in our case when the offset is negative or bigger than 15).
I did not know about the pblazasm project (or can't remember now). Funny that google did not point us there, and it is located in their site...
In pblaze-cc functions are re-entrant as usual in C. Function parameters are first passed in registers (s0-s3) and then on stack, hence stack usage is not a big issue (in terms of both data and instruction memory resources). Similarly local variables are allocated first in registers (s4-sC) and spilled to stack on demand.
Space--the final frontier!
03-20-2012 09:50 AM
I missed your datasheet, and it sounds very interesting : the kind of processor I was looking for. I will have a look as soon as possible.
03-26-2012 01:00 AM - last edited on 03-26-2012 02:05 AM by jheslip
This one is based on SDCC:
Link Removed see the link in the next post
It should be more a suitable Picoblaze cc; haven't tried it yet.
Henk van Kampen