Hi,
No, I haven't done a simulation, I directly tried it on the hardware. Should I try one to check a possible hardware problem ?
I connect the chipscope outside the picoblaze wrapper, so it shouldn't be a write_strobe problem I think. Here the picoblaze wrapper :
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
use IEEE.std_logic_unsigned.all;
entity proc is
Port (
o_debug : out std_logic_vector (7 downto 0);
rst : in std_logic;
clk : in std_logic
);
end proc;
architecture RTL of proc is
--
-- Declaration of the default Program Memory recommended for development.
--
-- The name of this component should match the name of your PSM file.
--
component pico_proc
generic( C_FAMILY : string := "V6";
C_RAM_SIZE_KWORDS : integer := 1;
C_JTAG_LOADER_ENABLE : integer := 0);
Port ( address : in std_logic_vector(11 downto 0);
instruction : out std_logic_vector(17 downto 0);
enable : in std_logic;
rdl : out std_logic;
clk : in std_logic);
end component;
--
-- Signals for connection of KCPSM6 and Program Memory.
--
signal address : std_logic_vector(11 downto 0);
signal instruction : std_logic_vector(17 downto 0);
signal bram_enable : std_logic;
signal in_port : std_logic_vector(7 downto 0);
signal out_port : std_logic_vector(7 downto 0);
signal port_id : std_logic_vector(7 downto 0);
signal write_strobe : std_logic;
signal k_write_strobe : std_logic;
signal read_strobe : std_logic;
signal interrupt : std_logic;
signal interrupt_ack : std_logic;
signal rdl : std_logic;
-- Signals for interrupt generation
--
signal interrupt_count : integer range 0 to 255 :=0;
signal interrupt_event : std_logic;
begin
--
-----------------------------------------------------------------------------------------
-- Instantiate KCPSM6 and connect to Program Memory
-----------------------------------------------------------------------------------------
--
-- The KCPSM6 generics can be defined as required but the default values are shown below
-- and these would be adequate for most designs.
--
processor: kcpsm6
generic map ( hwbuild => X"36", -- 36 hex is ASCII Character "6"
interrupt_vector => X"3FF",
scratch_pad_memory_size => 64)
port map( address => address,
instruction => instruction,
bram_enable => bram_enable,
port_id => port_id,
write_strobe => write_strobe,
k_write_strobe => k_write_strobe,
out_port => out_port,
read_strobe => read_strobe,
in_port => in_port,
interrupt => interrupt,
interrupt_ack => interrupt_ack,
sleep => '0',
reset => rst,
clk => clk);
--
-- The default Program Memory recommended for development.
--
-- The generics should be set to define the family, program size and enable the JTAG
-- Loader. As described in the documentation the initial recommended values are.
-- 'S6', '1' and '1' for a Spartan-6 design.
-- 'V6', '2' and '1' for a Virtex-6 design.
-- '7S', '2' and '1' for a Artix-7, Kintex-7 or Virtex-7 design.
-- Note that all 12-bits of the address are connected regardless of the program size
-- specified by the generic. Within the program memory only the appropriate address bits
-- will be used (e.g. 10 bits for 1K memory). This means it that you only need to modify
-- the generic when changing the size of your program.
--
-- When JTAG Loader updates the contents of the program memory KCPSM6 should be reset
-- so that the new program executes from address zero. The Reset During Load port 'rdl'
-- is therefore connected to the reset input of KCPSM6.
--
program_rom: pico_proc --Name to match your PSM file
generic map( C_FAMILY => "V6", --Family 'S6', 'V6' or '7S'
C_RAM_SIZE_KWORDS => 1, --Program size '1', '2' or '4'
C_JTAG_LOADER_ENABLE => 0) --Include JTAG Loader when set to '1'
port map( address => address,
instruction => instruction,
enable => bram_enable,
rdl => rdl,
clk => clk);
--
------------------------------------------------------------------------------------------
-- Interrupt
------------------------------------------------------------------------------------------
--
interrupt_control: process(clk)
begin
if clk'event and clk='1' then
if interrupt_count = 250 then
interrupt_count <= 0;
interrupt_event <= '1';
else
interrupt_count <= interrupt_count + 1;
interrupt_event <= '0';
end if;
-- processor interrupt waits for an acknowledgement
if interrupt_ack='1' then
interrupt <= '0';
elsif interrupt_event='1' then
interrupt <= '1';
else
interrupt <= interrupt;
end if;
end if;
end process interrupt_control;
--
-----------------------------------------------------------------------------------------
-- General Purpose Input Ports.
-----------------------------------------------------------------------------------------
--
output_port: process (clk)
begin
if (clk'event and clk = '1') then
if (port_id = "11111111") then
o_debug <= out_port;
end if;
end if;
end process;
end RTL;
And here how the chipscope is connected, the signals sv_cs_control and sv_debug being previously declared and initialized to 0 :
icon_u0 : icon
port map
(
CONTROL0 => sv_cs_control
);
ila _u0: chip_ila
port map (
CONTROL => sv_cs_control,
CLK => clk50,
TRIG0 => strig0,
);
proc_u0 : proc
port map (
rst => hard_reset_b,
clk => clk50,
o_debug => sv_debug,
);
strig0 <= sv_debug;
Thank you very much for your help (and sorry for my poor english)
