PicoBlaze

[ninjamafiakhan3]

I am new to using Picoblaze. I was trying to follow the procedure given at http://www.fpga.synth.net/pmwiki/pmwiki.php?n=FPGASynth.PicoBlazeVerilogDemo

I followed it word for word (I think). Upon running the Synthesis procedure in ISE, I got the following error message:

ERROR:HDLCompilers:92 - "Main.v" line 21 Too many port connections in instance 'CylonProcess' of module 'pbcylon'

I tried searching for this error on the net, but apparently Xilinx have not listed it under any heading. I am using the Spartan 3E Starter kit, same as the author of this tutorial. Can anybody please tell me what I am doing wrong AND/OR If this code works for you AND/OR You know of some other step by step guide for a total novice like this one as this was the only one I found on the internet?

[bassman59 · Accepted solution]

---

ninjamafiakhan3 wrote:

I am new to using Picoblaze. I was trying to follow the procedure given at http://www.fpga.synth.net/pmwiki/pmwiki.php?n=FPGASynth.PicoBlazeVerilogDemo

I followed it word for word (I think). Upon running the Synthesis procedure in ISE, I got the following error message:

ERROR:HDLCompilers:92 - "Main.v" line 21 Too many port connections in instance 'CylonProcess' of module 'pbcylon'

I tried searching for this error on the net, but apparently Xilinx have not listed it under any heading. I am using the Spartan 3E Starter kit, same as the author of this tutorial. Can anybody please tell me what I am doing wrong AND/OR If this code works for you AND/OR You know of some other step by step guide for a total novice like this one as this was the only one I found on the internet?

---

The error tells you what's wrong. The instance called CyloProcess of the module pbcylon has too many ports. If you are using the ROM_form.v template supplied with the PicoBlaze kcpsm3 distribution, look carefully at it. The module it creates has only three ports (address, instruction, clk). There is no reset going to or coming from that module.

The default ROM_form.v template, which the assembler uses when generating its "object" code, creates the ROM module with only three ports as noted above.

However, had you bothered to actually read the article to which you've linked, you'd see that the author is using the JTAG_Loader_ROM_form.v template. This template allows you to use your JTAG dongle to update the PicoBlaze firmware. The module created when assembling with this template has four ports, not three (proc_reset is a new output). The idea here is that you connect proc_reset to your PicoBlaze instance's reset input so that when you are loading new firmware over JTAG, the processor is held in reset.

So you have two choices:

a) use the JTAG_Loader_ROM_form.v template, as the author suggests, or

b) use the standard ROM_form.v template and delete the proc_reset port on your ROM instance.

-a

[eng.sanchit]

i am also new to picoblaze , i was trying to make a multiple output pico but i had some problem decoding the port_id

module picoblaze_example1(
    input FPGA_RESET,
    input CLK_50MHZ,
    output [7:0] LED
    );

   wire clock = CLK_50MHZ;
        // reset is active high.
        // if no reset signal input
        // then tie reset to zero here.

        wire             reset = FPGA_RESET;
        wire [7:0]    port_id;
        wire            write_strobe;
        wire             read_strobe;
        wire [7:0]    out_port;
        wire [7:0]    in_port=0;
        wire            interrupt=0;
        wire            interrupt_ack;
 

        embedded_kcpsm3 EMBEDDED(
                .port_id(port_id),
                .write_strobe(write_strobe),
                .read_strobe(read_strobe),
                .out_port(out_port),
                .in_port(in_port),
                .interrupt(interrupt),
                .interrupt_ack(interrupt_ack),
                .reset(reset),
                .clk(clock)
        );

        // only one bit written to by picoblaze, the LED.
        // therefore don't need to decode port_id.
        // if write_strobe asserts, grab out_port[0] and
        // hold it in userbit.

        reg [7:0] userbit = 0;

        always @(posedge clock) begin
                if(write_strobe) begin
                        userbit <= out_port;
                end
        end
          
        assign LED = userbit;

endmodule



this is the verilog file that i had used , how should i modify it for say two outports ( defined in IDE ) - LED1 (ID-$00) , LED2 (ID-$01)??

[chapman]

You may want multiple output ports but that is no reason to post the same question multiple times!

http://forums.xilinx.com/t5/PicoBlaze/PicoBlaze-FAQ-Are-there-any-reference-designs/m-p/189668#M1649

[eng.sanchit]

        reg [7:0] userbit = 0;
          reg [7:0] userbit1 = 0;


        always @(posedge clock) begin
        
          
        
                if(write_strobe ) begin
                       case (port_id )
                        
                        8'b0 : begin
                                userbit <= out_port ;
                         end
                  8'b1: begin
                        userbit1 <= out_port ;
                               end
                        endcase
                        
                         end
                         end
                        
         always @(posedge clock) begin
                if(read_strobe) begin
                     case (port_id)
                    8'b0    : begin
                    in_port <= switches;
                       end
               8'b1  : begin                              
               in_port <= switches1 ;         
                       end
                              endcase
                              end
                              end
       
        assign switches = nik1;
          assign switches1 = nik2 ;

assign LED1 = userbit1;
assign LED2 = userbit;
endmodule

I wrote this for a multiple input and multiple output case , is there a problem with having same port_id for two different pins , one of them is input and the other output ?

 Here is the pin description

-

nik1                DSIN     $00
nik2                DSIN     $FF
LED1                    DSOUT    $00
LED2                    DSOUT    $FF

[eteam00]

First, some comments on forum decorum and convention:

1.  It is considered bad manners to post the same question or topic to multiple threads.  This is called cross-posting.  It clutters the forums with repetition. It spreads a single discussion across multiple threads, making it difficult to follow the discussion or participate in the discussion.  Please post a single topic or question once.

2.  It is considered bad manners to post an unrelated topic or question to an existing thread.  This is analogous to carrying on two different conversations in a single small room.  Please create a new and separate thread for each distinct and unrelated discussion topic.

Now, let's discuss your code.

is there a problem with having same port_id for two different pins , one of them is input and the other output ?

No, there is no problem whatsoever.

Here is the pin description

-

nik1   DSIN     $00
nik2   DSIN     $FF
LED1   DSOUT    $00
LED2   DSOUT    $FF

Did you intend for the port_id mapping to match these assignments?  In the code you posted, only the values of 0 and 1 are recognised by the hardware as valid port addresses.

-- Bob Elkind

[eng.sanchit]

ok , thanks and sorry , my mistake .