The alternate JTAG header (J28) is provided for applications that can't use the embedded Platform USB, e.g.
-your computer doesn't have a USB port (and you need to use a Parallel-IV cable)
-you are using a version of ISE prior to introduction of support for the Platform USB
It is also likely a tradition to provide JTAG access via a header and some users would expect it.
The SPI header (J12) is provided to program the SPI Flash - which is a different interface and protocol.
From the S3EK User Guide (ug230.pdf):
/*
The starter kit board also includes an on-board USB-based JTAG programming interface.
The on-chip circuitry simplifies the device programming experience. In typical
applications, the JTAG programming hardware resides off-board or in a separate
programming module, such as the Xilinx Platform USB cable.
Download FPGA designs directly to the Spartan-3E FPGA via JTAG, using the onboard
USB interface. The on-board USB-JTAG logic also provides in-system
programming for the on-board Platform Flash PROM and the Xilinx XC2C64A CPLD.
SPI serial Flash and StrataFlash programming are performed separately.
*/
Embedding this circuitry saves the average user from having to purchase a cable that is roughly the same cost as the board itself.
Since customers expect an evaluation board with a lot of configuration flexibility, our boards likely have more configuration circuitry than the average FPGA board.
bt
