Silicon Devices - Others

[cambuskell]

Hello. 

since Xilinx EOL'd their 5V XCS line, I have been tasked with finding a replacement, and transferring the code from the old chips to the new ones.

For various reasons, I have chosen the 3E chip for this job.

This is my first project on FPGAs since I left school a few years back, so I'm still relatively new on the matter.

I have the webpack ISE 13.1

Does anybody have some general tips, or guidelines as to how I should proceed with this task?  Any suggestion, no matter how basic it may sound, would be appreciated. 

Thanks for your time.

-Cam

[gszakacs]

I guess the first question is what tools (Foundation?  Alliance?) you used for the original design,

and what was the design entry method (schematics? VHDL? Verilog?).

Also are you asking only about moving the code from the old FPGA to the new one, or are

you also still looking at board-level design issues?

The smallest S3E is probably larger than the XCS part you started with, and likely many

times faster, although it does not have 5V tolerant IO.  If the original design was done using

an HDL like VHDL or Verilog, then the port should be relatively straightforward, depending

on how many library elements were used.  If the original design was done with Foundation

schematics, you might find yourself re-entering it by hand.

Regards,

Gabor

[cambuskell]

Thanks for your post.  You gave me lots of things to research that I didn't know about before.

The original tool used wwas Foundation 2.1, using schematic based design.

The new and the old chips have the identicle footprint, but some pins are different.  Mild changes to the board will be needed, but I'm not looking to discuss a board level design change. 

My goal is to transfer only the code from the old chips to the new ones.

As it stands, I'm hoping to find a copy/license of Foundation x.x, copy the schematics over to ISE 13.1, change the relative pins, and compile.

Is this plan valid?

Will the primatives used on the XCS remain valid for the 3E?  I'm fine re-entering the design as long as the schematics are the same for both programs. 

Otherwise, I would prefer to use Verilog, where I am far more comfortable with.

[gszakacs]

My goal is to transfer only the code from the old chips to the new ones.

As it stands, I'm hoping to find a copy/license of Foundation x.x, copy the schematics over to ISE 13.1, change the relative pins, and compile.

Unless you have printouts of the schematics, you probably need to find an old copy of Foundation

just to read them.  The last version to use the Aldec schematics was 4.1

The only other approach to resurrecting the old schematics may be to go to Aldec for at least

a trial license of their latest tools, which I believe can still import the old Foundation schematics.

ISE 13.1 will definitely not read the old schematics.

Will the primatives used on the XCS remain valid for the 3E?  I'm fine re-entering the design as long as the schematics are the same for both programs. 

It's likely that the primitives used in the old schematic design are still available for use in

the Spartan 3, either as primitives or macros, even if you don't see them in the latest library

guide for HDL design.  Of course things like flip-flops and gates are pretty self-evident even

if you don't have the exact same symbol in the new schematic tools.

Otherwise, I would prefer to use Verilog, where I am far more comfortable with.

That would be my preference as well.  It may take a bit longer than copying the schematic, but

it will help you to understand the existing design as you translate it to Verilog.  Also the

poor b**tard who needs to update the design 5 years from now will thank you for it.

-- Gabor

[cambuskell]

Unless you have printouts of the schematics, you probably need to find an old copy of Foundation

just to read them.  The last version to use the Aldec schematics was 4.1

I was able to get a hold of Foundation 2.1i.  So I can view and manipulate the old code to my hearts content.

I don't suppose there is a way to import the Spartan 3E into this software, is there?

Failing that, I'll have to manually enter each block into ISE13.1.  This isn't a big deal, as long as the timing for every block is still the same.  I realize that there is a different clocking crystal involved in the 3E, but I assume I can divide that down to equal the old clock as well.

[eteam00]

I was able to get a hold of Foundation 2.1i.  So I can view and manipulate the old code to my hearts content.

I don't suppose there is a way to import the Spartan 3E into this software, is there?

I would strongly caution you against this.

1.  The ancient schematic library symbols were primarily device primitives.  Designing in an HDL with primitives is the exception case, rather than the typical case.  In other words, the old XCS schematic design -- converted to HDL form -- is not equivalent to an HDL design.

2.  Ignoring the fact that a simple translation from XCS to S-3E is not likely to work without considerable help, you will need to understand the design well enough to debug and verify it.  Understanding the original design is therefore unavoidable.  This leaves little or no benefit to a mindless format conversion process.

3.  Who knows what ugly warts are hidden in the original design (e.g. asynchronous design, poor use of clocks, etc.).  Use this opportunity to understand and clean up the original design.

4.  Just as the original XCS device is obsolete, it is likely that many of the board components and interfaces are also obsolete.  Updating the the external components on the board is quite likely to provoke additional changes to the FPGA design.  This is an opportunity for cost reductions which should not be ignored.

-- Bob Elkind