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DSP Coregen and Hardware cosimulati on
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07-19-2011 06:30 AM
Hello,
I have a ML507 (V5FX70T) Evaluation board and I try to implement HW co simulation. In my previous post, I did a HW co simulation with only LUTs in my design. Now, I want to make a HW co simulation with a DSP included in an entity. You can see the hierarchy in the attach file.
When I run the simulation, I have the following error :
++++++++++++++++++++++++++++++++++++++++++++++++++
INFO:HWCoSim - Implementing hardware co-simulation top-level through NGDBuild, MAP and PAR
ERROR:HWCoSim - Program 'xflow' reported the following errors:
--------------------------------------------------
ERROR:NgdBuild:604 - logical block
'hwcif/hwcosim_dut_inst/DSP_COREGEN_INST/MULT_INST
could not be resolved. A pin name misspelling can cause this, a missing edif
or ngc file, case mismatch between the block name and the edif or ngc file
name, or the misspelling of a type name. Symbol 'MULTIPLIEUR' is not
supported in target 'virtex5'.
ERROR:Xflow - Program ngdbuild returned error code 2. Aborting flow execution...
--------------------------------------------------
ERROR:HWCoSim - Program 'xflow' returned with a non-zero exit code 1. Please refer to log file 'E:\SEBASTIEN_LAMONNIER\Fonctionnalites\CoSimuHard
HDL wrapper and bitstream generation process failed.
++++++++++++++++++++++++++++++++++++++++++++++++++
So I think the error is concerning the instance U0 in the VHD generated by Coregen (instanciation of wrapped_Multiplieur).
I regenerated the Coregen, I imported ngc, vhd etc without success... but I can make HW cosimulation if I declare a bloc without Coregen in it (I_COMPTEUR for example in my design).
Perhaps anyone will have a good idea to help me !!!
Thanks a lot :)
Lamonnis
Solved! Go to Solution.
Re: DSP Coregen and Hardware cosimulati on
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07-19-2011 08:34 AM
The tools do not speak French...
C'est domage, mais c'est le verite....
Principal Engineer
Xilinx San Jose
Re: DSP Coregen and Hardware cosimulati on
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07-19-2011 11:54 PM
Hello,
Although I am french, I can understand English :)
That I don't understand is why a normal NGDbuild, MAP and PAR and simulation without HW co simulation work perfectly and why I have the problem with HW co-sim...
thanks
Lamonnis
PS : Austin, LA vérité :)
Re: DSP Coregen and Hardware cosimulati on
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07-22-2011 06:59 AM
Hello,
The problem is resolved by copying NGC sources directly in the project directory (same level than project.xise). Xflow doesn't use the same processes than a normal implementation where you can specify macro path.
perhaps it will be better supported in next releases.
That was not a french problem ;-)
Lamonnis
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03-12-2012 05:26 AM
How can you add ngc files if you are using fuse with command line? I see the same error as described previously, but there is no .xise file when using command line.
Thanks.











