It appears that the analog output for ISIM is still not done for 14.1. As an end user I have been waiting for this to be put into ISIM ever since it came out. The statement in the ISIM user guide that this will be in the next release, over several releases, is something that has led me to disbelieve anything Xilinx might say will ever get done.
I would tend to agree with others that Xilinx should be paying some attention to how good the tools are to design with. Given the focus Xilinx has on video and comms I would think that having an analog format for the simulation output would be a must.
If I had known that support for analog output would never get put into ISIM and was in the middle of a ISE project that required analog output simulation at the time MODELSIM went away I would have bought MODELSIM with hope that support for it would continue into later versions of ISE.
Also at this point the ISE 14.1 tool will no longer compile the ISIM test bench simulation I have do to errors from the ISE generated in the timesim.vhdl model. So ISIM and ISE are moving ahead in the normal direction, which seems to be backwards in most cases.
Jay
