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Visitor

Posts: 9

Registered: ‎02-24-2010

ISim support for hierarchical signal referencing in VHDL

‎04-18-2012 05:46 PM

Most VHDL simulators have a library allowing users to manipulate lower level hierarchical signals in a testbench. For example, in ModelSim this feature is called Signal Spy. Will ISim have a feature like that any time soon?

Ivan

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