Simulation and Verification

[jcms]

Hey everyone, this is my first time posting here.

I have a 13'' 2010 Macbook Pro and I'm running Windows 7 x64 under Parallels. Everytime I try to run a VHDL test bench, I get "The simulator has terminated in an unexpected manner". This is happening with every project, under 12.3, 12,4 and 13.1. I uninstalled and re-install 3 or 4 times. None of my friends with a similar set up are getting this error. Is there a simple fix for that?

Thanks!

[galindo_juanjo]

Same problem.

In my case: Windows 7, processor i7, ISE 13.2

I tried to follow ISIM In depth tutorial "ug682" unsuccesfuly. It always crashes when executing simulation exe file. The O.S. says that program stopped working.  I tried both command line 32 and 64 bits with path PATH pointing to 32 and 64 bits binaries.

Fuse seems to work properly with no error messages,but next step : execution of simulation exe file, always fails.

I was going to re-install ISE when I read previous post.

I tried the same in a: Windows XP, processor Dual2Duo with no problems.

Did anybody find a way to make it work with windows 7 ? Is there a fix for that?

[debrajr]

These crashes are mostly localised to Windows 7 64 bit machines. We have already received similar issues and these are already been worked upon. The future releases of the tool (post 13.4) would have more stable operation when it comes to running simulation in Win 7 64 bit platform.

1. If you have any Win XP 32/64 bit or Win 7 32 bit or LINUX machine, try using them in case you are getting a crash with Win 7 64 bit machine as a workaround.
2. If you are getting any Error/Warning/Fatal Error before the tool is crashing, it would be helpful if you can raise a webcase with Xilinx highlighting that message and it would be handled accordingly. ....

[mvalvo]

I'm having the same problem on my 64b machine.  when is this going to get fixed?  is there anything I can do.  I've already tried making a webcase, but they don't think its a problem.

[dbarrowman]

I have a similar problem as well. This has been going on for at least a year, multiple webcases opened. In my case, it seems that ISIM will crash if I put either more than a certain number of signals in the waveform viewer, or specific groups of signals (I suspect arrays may be a problem but I'm not sure).

Has anyone else found a work around, other than just using a different OS?

Thanks,

Dan

[moijhd]

Hi,

I have just installed the 13.4 Xilinx version and still have a "ISim stop working" windows alert at the end of Elaborating step.

I am running on Windows Seven x64.

The strange thing is that it was working properly three months ago. When I tried to re-open a project from that ime it crashed. In that lapse of time, there has been no big change in my computer except Windows Update and the installation of Microsoft Visual Studio 2010 Express for MATLAB compiler.

By the way, there are no alert messages on consoles.

Thanks.

[roger.steines@gtri.gatech.edu · Accepted solution]

I'm running Win7 64-bit, I7 processor, ISE13.1 full version. My design consists of over 1k lines of verilog, including coregen modules.

I was getting the same uninformative message and an isim crash when just a day ago it was working fine. After a painful process of elimination, I found a bug in my verilog code in which the nonexistent 9th bit of an 8 bit vector was being used. When I fixed the bug, the simulator starting working again. Just to be sure, I added a similar bug to a different file and the simulator started to crash again.

If you are like me and can't justify another ISE upgrade, be aware that the simulator does not deal with certain king of bugs well. That kind of defeats the purpose of a simulator but hey, it's still a lot cheaper than Modelsim...

[dbarrowman]

Thanks for that. It's good to know since now we at least can narrow down, in which haystack to go looking for the needle. :)

I wish the simulator could better distinguish, or let you distinguish, between vhdl that is meant to be synthesized and vhdl that is not. You could have it at least error check and find simple things that don't make any sense in vhdl that will be sythesized. These are usually just simple mistakes that it could alert you about.

But I agree, for the price, it's not bad. :)

Regards,

Dan

[graces]

Please check fuse.log to see if there're any related WARNING messages.

[toptensoftware]

I'm not sure if this will work for you but I was having the exact same problem and noticed that if I run from the "ISE Design Suite 64 Bit Command Line" it works.  Digging a little deeper it seems that it relies on the environment variable XILINX being set correctly.

In a normal command prompt if I set this:

> set XILINX=C:\Xilinx\13.2\ISE_DS\ISE

then it works.