MXE6.2CFULL Verilog timing simulation capability(no of lines of code)/* Warning: Design size of 56613 statements or 1 non-Xilinx leaf instances exceeds ModelSim XE-Starter recommended capacity.

ramakrishna2 · ‎04-16-2010

I'm working on spartan3A FPGA with ISE9.2I and ModelsimXEIII 6.2C Full Verilog version.My design and testbench size is around 8K Lines.My functional simulation of the design is working fine.But if i do post translate or Post Route simulation in MXE, iam getting following warning message and simulation running too much slow.

# ** Warning: Design size of 70263 statements or 1 non-Xilinx leaf instances exceeds ModelSim XE-Starter recommended capacity.
# Expect performance to be quite adversely affected.

How the tool is decided design size count as 70263,when actual count is 8000 statements.Can some one clarify me, if iam doing the simulation wrong way or iam missing anything.

Thanks in advance

eilert · ‎08-14-2007

Hi,

there can be more than one statement in a codeline.

And libraries etc. also have codelines.

Have a nice simulation

Eilert

gszakacs · ‎08-14-2007

8,000 statements would be (close to) the count for behavioral simulation, with the addition of any

libraries or multi-statement lines as noted. However once you translate the design you need to

look at the post-translate simulation model to count lines. Since these models typically consist

of structural code for all LUT and flip-flop instances as well as any RAM blocks, etc, they typically

have many more statements than your original source.

-- Gabor

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Simulation and Verification

MXE6.2CFULL Verilog timing simulation capability(no of lines of code)/* Warning: Design size of 56613 statements or 1 non-Xilinx leaf instances exceeds ModelSim XE-Starter recommended capacity.

Re: MXE6.2CFULL Verilog timing simulation capability(no of lines of code)/* Warning: Design size of 56613 statements or 1 non-Xilinx leaf instances exceeds ModelSim XE-Starter recommended capacity.

Re: MXE6.2CFULL Verilog timing simulation capability(no of lines of code)/* Warning: Design size of 56613 statements or 1 non-Xilinx leaf instances exceeds ModelSim XE-Starter recommended capacity.