Hi Juan,
the wait statement just sets some timing information but does not change signal values.
The scenario you described would need something like this in your stimuli process:
-- t=0
my_input <= '0'; -- initial input value
wait for 80 ns; -- initial delay
my_input <= '1'; -- input asserted
wait for 10 ns; -- signal hold time
my_input <= '0'; -- input deasserted
... -- more stimuli to follow
Another option would be to use the after statement in the assignment to the signal.
This is a little more tricky , but shorter and works concurrently as well as in a process.
Syntax may look like this:
my_input <= '0',
'1' after 80 ns,
'0' after 90 ns;
This table like style makes reading and editing easier, compared to a single line.
See, that the times are absolute here starting at the time of assingment, and increasing then.
For special modeling purtposes there are modifiers like "transport", "reject" etc. Read about the details in a textbook about VHDL.
Have a nice simulation
Eilert
