Simulation and Verification

[puxiangjun]

Hi:

  I I encountered a problem when use NC-verilog to simulation, It's about glbl.v file.please see below:

"ncelab: *E,DLCSMD: Dependent checksum module worklib.glbl:v (SIG) <0x195f55ca> doesn't match with the checksum that's in the header of: module unisims_ver.OBUF:module (SIG) <0x27a359a9>.

ncelab: *W,DLWNEW: Intermediate file module worklib.glbl:v (VST)         is newer than expected by module unisims_ver.OBUF:module (SIG) <0x27a359a9>                

 actual:   Thu Apr 19 15:11:29 2012                

 expected: Wed Apr 18 09:08:30 2012.

 ncelab: *E,DLCSMD: Dependent checksum module worklib.glbl:v (SIG) <0x195f55ca> doesn't match with the checksum that's in the header of: module unisims_ver.OBUF:module (SIG) <0x27a359a9>.

 ncelab: *W,DLWNEW: Intermediate file module worklib.glbl:v (VST)         is newer than expected by module unisims_ver.OBUF:module (SIG) <0x27a359a9>                

 actual:   Thu Apr 19 15:11:29 2012                

 expected: Wed Apr 18 09:08:30 2012.

........

.......

......"

   Who can tell me why? and how to resolve this problem?Thanks!

[graces]

What's the NCsim command used?

It looks the error is caused by version mismatch between glbl.v and unsims lib.

You can also contact Cadence as it's a tool specific message.