Sign In

Don't have a Xilinx account yet?

  • Choose to receive important news and product information
  • Gain access to special content
  • Personalize your web experience on Xilinx.com

Create Account

Username

Password

Forgot your password?
XClose Panel
Xilinx Home
Reply
Regular Visitor
xiaochh
Posts: 32
Registered: ‎05-06-2008
0
Accepted Solution

About the resource RAMB16BWERs & RAMB8BWERs

 

   Hello,Everyone. We know that there are 32  Block RAM Blocks of 18Kbits in spartan 6LX-16.

   But I don't understand that why the bram resource is divided to RAMB16BWERs and RAMB8BWERs  after Synthesized , in one of my ip .xrpt file , the Specific Feature Utilization: is as follows:

 

Number of RAMB16BWERs

2

32

6%

 

Number of RAMB8BWERs

2

64

3%

 

 

   And in the total design design summary ,the bram resource  is :

                            Number of Block RAM/FIFO:               24  out of     96    25% 

 

   But the total bram is 32, if it is used as two independent 9 Kb ,it is 64 . Why here in the summary it is 96 ?

   If The 32 RAMB16BWERs  and the 64 RAMB8BWERs are different resource applyed ?

 

  Thanks ,Sincerely!

Xilinx Employee
barriet
Posts: 2,435
Registered: ‎08-13-2007

Re: About the resource RAMB16BWERs & RAMB8BWERs

The 16/18Kb BRAMs can each be fractured into 2 8/9Kb BRAMs. I suspect they are broken out like this to give you better visibility into their usage.

But you are correct - they should not be totaled - it is an either/or situation not both.

 

This appears to be a bug in the reporting scheme.

 

bt

Regular Visitor
xiaochh
Posts: 32
Registered: ‎05-06-2008
0

Re: About the resource RAMB16BWERs & RAMB8BWERs

Thanks, timpe ,your information is very important for my project.

 :smileyhappy: