Spartan® Family FPGAs

[rick.b.brown]

I have a board designed with multiples of the same Spartan-6 device connected in a serial daisy chain (total of 8).  The first one configured for master serial mode and the remaning in slave serial mode.  The master is attached to a single 64Mb SPI device for configuration.

My application uses all 8 devices running the exact same design and therefore only use a single bitstream.  Unfortunately, I don't have the space in the SPI flash to store essentially 8 copies of the same design for concatenation; which is how I understand the PROMGen tool to work.  Is there a way to save flash space and only store a single copy of this bitstream?

[eteam00 · Accepted solution]

See UG380, section titled Ganged Serial Configuration.  It describes your design exactly.  In UG380 version 2.3, this section begins on page 135.

-- Bob Elkind

[rick.b.brown]

Thank you for the reply.  That's what my design *should* have been in the first place.

My hardware was routed in a daisy chain as shown in Figure 9-1.  I have series termination in-between the DOUT to DIN signals on the slaves.  I was able to remove these, rewire the data path to a ganged configuration and deadbug in a thevenin termination at the end. Works great now.