Hi all you experts, here's a challenge ...I've got a design that receives data from two Analog Devices AD9276 8 channel, 12-bit, 80MSPS serial ADCs. It works fine using the SelectIO deserialization techniques writing to block ram. Now I have another application where I would just like to make a "repeater", sending the raw AD9276 DDR data, frame, and DDR clocks on to another Spartan 6 on a different board. I can't seem to find a solution. Just passing it through the device (lvds to logic back out to lvds) kind of works, but the delay skew is more than the clock period, so this can't work. I can also define a SERDES block with seperate inputs and outputs, but this requires that both the inputs and outputs are on the same half-bank. Unfortunately the outputs to the second device are on a different bank. I've also tried to deserialize the data, latching it with the clk_div, then serializing it using a BUF_PLL. Unfortunately the DDR clock coming from the AD9276 is 480MHz, which is too high a frequency for the BUF_PLL in my LX16-3. Any other tricks I could try? Maybe using a 12-1 serialization instead of the 6-1? I just need an output scheme that can keep up with the 960MBPS coming in from the ADC.
Cheers to all you smart guys out there who always help ...
