Spartan® Family FPGAs

[sjjma]

I'm seeing a 1v, maybe a lttle less, to 1.4  variation on the 1.2v pins of a Spartan3e automotive fpga.

I also can't initialize the jtag chain correctly, Impact sees 17 unknown devices with the above fpga in the chain.

Impact see the other jtag chips correclty if the above fpga is not in the jtag chain.

So I'm wondering if the 12.v supply is the problem ?

[bassman59]

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sjjma wrote:

I'm seeing a 1v, maybe a lttle less, to 1.4  variation on the 1.2v pins of a Spartan3e automotive fpga.

I also can't initialize the jtag chain correctly, Impact sees 17 unknown devices with the above fpga in the chain.

Impact see the other jtag chips correclty if the above fpga is not in the jtag chain.

So I'm wondering if the 12.v supply is the problem ?

---

TFDS says VCCINT ranges from 1.140 V min, 1.200 V nominal, 1.260 V max. Absolute maximum on VCCINT is 1.32 V, so expect issues if the supply goes to 1.4 V for any non-trivial amount of time. Also noted in TFDS is that VCCINT needs to be above 1.0 V at all times to preserve RAM (that is, configuration) contents.

it is easy peasy to design a 1.2 V supply with variations much less than what you're seeing. Why is your power supply so terrible?

[sjjma]

What's TFDS ? I looked in the Spartan 3 datasheets, ds312 and ds635, and didn't see any spec except absolute max. I
didn't design the pcb or had any input. Just told to find out why
it doesn't work.

[bassman59]

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sjjma wrote:
What's TFDS ? I looked in the Spartan 3 datasheets, ds312 and ds635, and didn't see any spec except absolute max. I
didn't design the pcb or had any input. Just told to find out why
it doesn't work.

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"TFDS" = "The Fine Data Sheet." 

Look more closelier.

Table 76, General Recommended Operating Conditions (page 121 on DS312 v3.7, 18 Apr 2008) shows the valid power supply ranges.

If your supply varies as much as it does, it is broken. Are the regulators on the board with the FPGA or are they elsewhere?

[sjjma]

Page 119 of ds312 ver 3.8, which is what I have. Ok, I am blind. Regulators are on board. Thanks for the quick help.
I can mange the rest.

[gszakacs]

Remember that the Vccint supply current is dominated by dynamic current for most FPGA designs.

This means you need some hefty low ESR capacitors very close to the FPGA power pins.  If I

had to guess, unless your regulators are of the LDO type that goes unstable with too much

output capacitance, adding a 22uF ceramic right near the Vccint pins will fix the problem.

-- Gabor