07-09-2012 10:45 AM
I have spartan 6 and i need to performe an addition with ISE schematic technique, the problem is my project need 32 bits with Two's-Complement Operation and fixedpoint but the blocks work with 16 bits only and i can not see the option for the fixedpoint operation.
does any on have an idea to do this, and i am sorry for my little english.
07-09-2012 10:56 AM
If you are a student enrolled in a training course, is your instructor able to help?
Why are you learning to use schematics for FPGA design entry, rather than VHDL or Verilog?
Are you seeking help with understanding how to perform signed integer arithmetic, or are you seeking help with the use of the schematic editor? This is not clear from your first post, and these are two very different problems.
-- Bob Elkind
README for newbies is here: http://forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369
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