06-02-2012 07:35 PM
06-02-2012 10:32 PM
Actually I am trying to use FPGA in loop (FIL) using hdl verifier in simulink using eda simulator link. But I get the error
"Did not receive version information from the hardware. You must have a valid connection, a compatible development board, and compatible versions of the block and FPGA programming file."
I am not able to reply from the board as well, when I ping it. So, I thought I might have got the mac address wrong.
You mean, I can take any mac address??
One more thing, how to assign an IP address to the board?
06-04-2012 07:01 PM
I'm not very familiar with Simulink and its HDL stuff. However if you've defined an Ethernet data source or sink, you probably need to define a MAC address and IP address for these too, and they can be anything you like.
There's no guarantee that these blocks also implement ICMP and ping replies (or even ARP replies for that matter) - you will need to look at the Simulink documentation to see what the normal procedure is. As long as the Ethernet PHY on the Atlys is actually supported (I'd be surprised if it wasn't), it shouldn't be any different from any other FPGA board.